1. 24 11月, 2013 1 次提交
  2. 15 11月, 2013 4 次提交
    • W
      tree-wide: use reinit_completion instead of INIT_COMPLETION · 16735d02
      Wolfram Sang 提交于
      Use this new function to make code more comprehensible, since we are
      reinitialzing the completion, not initializing.
      
      [akpm@linux-foundation.org: linux-next resyncs]
      Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      Acked-by: Linus Walleij <linus.walleij@linaro.org> (personally at LCE13)
      Cc: Ingo Molnar <mingo@kernel.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      16735d02
    • J
      spi: Use stable dev_name for ACPI enumerated SPI slaves · e13ac47b
      Jarkko Nikula 提交于
      Current spi bus_num.chip_select "spix.y" based device naming scheme may not
      be stable enough to be used in name based matching, for instance within
      ALSA SoC subsystem.
      
      This can be problem in PC kind of platforms if there are changes in SPI bus
      configuration, amount of busses or probe order.
      
      This patch addresses the problem by using the ACPI device name with
      "spi-" prefix for ACPI enumerated SPI slave. For them device name
      "spix.y" becomes "spi-INTABCD:ij".
      Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
      Acked-by: NMark Brown <broonie@linaro.org>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      e13ac47b
    • R
      ACPI / driver core: Store an ACPI device pointer in struct acpi_dev_node · 7b199811
      Rafael J. Wysocki 提交于
      Modify struct acpi_dev_node to contain a pointer to struct acpi_device
      associated with the given device object (that is, its ACPI companion
      device) instead of an ACPI handle corresponding to it.  Introduce two
      new macros for manipulating that pointer in a CONFIG_ACPI-safe way,
      ACPI_COMPANION() and ACPI_COMPANION_SET(), and rework the
      ACPI_HANDLE() macro to take the above changes into account.
      Drop the ACPI_HANDLE_SET() macro entirely and rework its users to
      use ACPI_COMPANION_SET() instead.  For some of them who used to
      pass the result of acpi_get_child() directly to ACPI_HANDLE_SET()
      introduce a helper routine acpi_preset_companion() doing an
      equivalent thing.
      
      The main motivation for doing this is that there are things
      represented by struct acpi_device objects that don't have valid
      ACPI handles (so called fixed ACPI hardware features, such as
      power and sleep buttons) and we would like to create platform
      device objects for them and "glue" them to their ACPI companions
      in the usual way (which currently is impossible due to the
      lack of valid ACPI handles).  However, there are more reasons
      why it may be useful.
      
      First, struct acpi_device pointers allow of much better type checking
      than void pointers which are ACPI handles, so it should be more
      difficult to write buggy code using modified struct acpi_dev_node
      and the new macros.  Second, the change should help to reduce (over
      time) the number of places in which the result of ACPI_HANDLE() is
      passed to acpi_bus_get_device() in order to obtain a pointer to the
      struct acpi_device associated with the given "physical" device,
      because now that pointer is returned by ACPI_COMPANION() directly.
      Finally, the change should make it easier to write generic code that
      will build both for CONFIG_ACPI set and unset without adding explicit
      compiler directives to it.
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> # on Haswell
      Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Reviewed-by: Aaron Lu <aaron.lu@intel.com> # for ATA and SDIO part
      7b199811
    • B
      dmaengine: remove DMA unmap flags · 0776ae7b
      Bartlomiej Zolnierkiewicz 提交于
      Remove no longer needed DMA unmap flags:
      - DMA_COMPL_SKIP_SRC_UNMAP
      - DMA_COMPL_SKIP_DEST_UNMAP
      - DMA_COMPL_SRC_UNMAP_SINGLE
      - DMA_COMPL_DEST_UNMAP_SINGLE
      
      Cc: Vinod Koul <vinod.koul@intel.com>
      Cc: Tomasz Figa <t.figa@samsung.com>
      Cc: Dave Jiang <dave.jiang@intel.com>
      Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
      Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
      Acked-by: NJon Mason <jon.mason@intel.com>
      Acked-by: NMark Brown <broonie@linaro.org>
      [djbw: clean up straggling skip unmap flags in ntb]
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      0776ae7b
  3. 11 11月, 2013 1 次提交
    • R
      powerpc: add missing explicit OF includes for ppc · c11eede6
      Rob Herring 提交于
      Commit b5b4bb3f (of: only include prom.h on sparc) removed implicit
      includes of of_*.h headers by powerpc's prom.h. Some components were
      missed in initial clean-up patch, so add the necessary includes to fix
      powerpc builds.
      Signed-off-by: NRob Herring <rob.herring@calxeda.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Tejun Heo <tj@kernel.org>
      Cc: Matt Mackall <mpm@selenic.com>
      Cc: Herbert Xu <herbert@gondor.apana.org.au>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Vinod Koul <vinod.koul@intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: linuxppc-dev@lists.ozlabs.org
      Cc: linux-ide@vger.kernel.org
      Cc: linux-crypto@vger.kernel.org
      c11eede6
  4. 25 10月, 2013 1 次提交
  5. 24 10月, 2013 1 次提交
  6. 23 10月, 2013 2 次提交
  7. 22 10月, 2013 2 次提交
    • K
      spi/s3c64xx: Fix doubled clock disable on suspend · 9d7fd21a
      Krzysztof Kozlowski 提交于
      Fix doubled clock disable and unprepare during PM suspend which triggered
      the warnings:
      
      WARNING: at drivers/clk/clk.c:800 clk_disable+0x18/0x24()
      Modules linked in:
      CPU: 0 PID: 1745 Comm: sh Not tainted 3.10.14-01211-ge2549bb-dirty #62
      [<c0015980>] (unwind_backtrace+0x0/0x138) from [<c0012a44>] (show_stack+0x10/0x14)
      [<c0012a44>] (show_stack+0x10/0x14) from [<c0022818>] (warn_slowpath_common+0x4c/0x68)
      [<c0022818>] (warn_slowpath_common+0x4c/0x68) from [<c0022850>] (warn_slowpath_null+0x1c/0x24)
      [<c0022850>] (warn_slowpath_null+0x1c/0x24) from [<c036e274>] (clk_disable+0x18/0x24)
      [<c036e274>] (clk_disable+0x18/0x24) from [<c02d5f78>] (s3c64xx_spi_suspend+0x28/0x54)
      [<c02d5f78>] (s3c64xx_spi_suspend+0x28/0x54) from [<c02b3a54>] (platform_pm_suspend+0x2c/0x5c)
      [<c02b3a54>] (platform_pm_suspend+0x2c/0x5c) from [<c02b8a30>] (dpm_run_callback+0x44/0x7c)
      [<c02b8a30>] (dpm_run_callback+0x44/0x7c) from [<c02b8b70>] (__device_suspend+0x108/0x300)
      [<c02b8b70>] (__device_suspend+0x108/0x300) from [<c02ba4e0>] (dpm_suspend+0x54/0x208)
      [<c02ba4e0>] (dpm_suspend+0x54/0x208) from [<c0066bcc>] (suspend_devices_and_enter+0x98/0x458)
      [<c0066bcc>] (suspend_devices_and_enter+0x98/0x458) from [<c0067150>] (pm_suspend+0x1c4/0x25c)
      [<c0067150>] (pm_suspend+0x1c4/0x25c) from [<c0066044>] (state_store+0x6c/0xbc)
      [<c0066044>] (state_store+0x6c/0xbc) from [<c0203290>] (kobj_attr_store+0x14/0x20)
      [<c0203290>] (kobj_attr_store+0x14/0x20) from [<c0157530>] (sysfs_write_file+0xfc/0x164)
      [<c0157530>] (sysfs_write_file+0xfc/0x164) from [<c00fd6b0>] (vfs_write+0xbc/0x1bc)
      [<c00fd6b0>] (vfs_write+0xbc/0x1bc) from [<c00fdaf0>] (SyS_write+0x40/0x68)
      [<c00fdaf0>] (SyS_write+0x40/0x68) from [<c000ea80>] (ret_fast_syscall+0x0/0x3c)
      
      The clocks may be already disabled before suspending. Check PM runtime
      suspend status and disable clocks only if device is not suspended.
      During resume do not enable the clocks if device is runtime suspended.
      Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
      Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
      Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      9d7fd21a
    • K
      spi/s3c64xx: Do not ignore return value of spi_master_resume/suspend · 347de6ba
      Krzysztof Kozlowski 提交于
      During PM resume and suspend do not ignore the return value of
      spi_master_suspend() or spi_master_resume(). Instead pass it further.
      Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
      Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
      Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      347de6ba
  8. 18 10月, 2013 15 次提交
    • T
      spi: spi-mxs: Use u32 instead of uint32_t · 42e182f8
      Trent Piepho 提交于
      It's consistent with all the other spi drivers that way.
      Signed-off-by: NTrent Piepho <tpiepho@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      42e182f8
    • T
      spi: spi-mxs: Don't set clock for each xfer · a560943e
      Trent Piepho 提交于
      mxs_spi_setup_transfer() would set the SSP SCK rate every time it was
      called, which is before every transfer.  It is uncommon for the SCK rate to
      change between transfers (or at all of that matter) and this causes many
      unnecessary reprogrammings of the clock registers.
      
      Code changed to only set the rate when it changes.  This significantly
      speeds up short SPI messages, especially messages made up of many transfers,
      as the calculation of the clock divisors is rather costly.  On an iMX287,
      using spidev with messages that consist of 511 transfers of 4 bytes each at
      an SCK of 48 MHz, the effective transfer rate more than doubles from about
      290 KB/sec to 600 KB/sec!
      Signed-off-by: NTrent Piepho <tpiepho@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      a560943e
    • T
      spi: spi-mxs: Clean up setup_transfer function · aa9e0c6f
      Trent Piepho 提交于
      It can't be called with a NULL transfer anymore so it can be simplified
      to not check for that.
      
      Fix indention of line-wrapped code to Linux standard.
      
      The transfer pointer can be const.
      
      It's not necessary to check if the spi_transfer's speed_hz is zero, as
      the spi core also fills it in from the spi_device.  However, the spi
      core does not check if spi_device's speed is zero so we have to do
      that still.
      Signed-off-by: NTrent Piepho <tpiepho@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      aa9e0c6f
    • T
      spi: spi-mxs: Remove check of spi mode bits · d426eadb
      Trent Piepho 提交于
      The spi core already checks for a slave setting mode bits that we
      didn't list as supported when the master was registered.  There is no
      need to do it again in the master driver.
      Signed-off-by: NTrent Piepho <tpiepho@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      d426eadb
    • T
      spi: spi-mxs: Fix race in setup method · 9c97e342
      Trent Piepho 提交于
      Despite many warnings in the SPI documentation and code, the spi-mxs
      driver sets shared chip registers in the ->setup method.  This method can
      be called when transfers are in progress on other slaves controlled by the
      master.  Setting registers or any other shared state will corrupt those
      transfers.
      
      So fix mxs_spi_setup() to not call mxs_spi_setup_transfer().
      mxs_spi_setup_transfer() is already called for each transfer when they
      are actually performed in mxs_spi_transfer_one(), so the call in
      mxs_spi_setup() isn't necessary to setup anything.
      Signed-off-by: NTrent Piepho <tpiepho@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      9c97e342
    • T
      spi: spi-mxs: Remove bogus setting of ssp clk rate field · 1a33073f
      Trent Piepho 提交于
      The ssp struct has a clock rate field, to provide the actual value, in Hz,
      of the SSP output clock (the rate of SSP_SCK) after mxs_ssp_set_clk_rate()
      is called.  It is set by mxs_ssp_set_clk_rate(), for SSP using drivers (like
      SPI and MMC) to *read* if they want to know the actual clock rate.  The SPI
      driver isn't supposed to *write* to it.
      
      For some reason the spi-mxs driver decides to write to this field on init,
      and sets it to the value of the SSP input clock (clk_sspN, from the MXS
      clocking block) in kHz.  It shouldn't be setting the value, and certainly
      shouldn't be setting it with the wrong clock in the wrong units.
      Signed-off-by: NTrent Piepho <tpiepho@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      1a33073f
    • T
      spi: spi-mxs: Remove full duplex check, spi core already does it · 210f65fe
      Trent Piepho 提交于
      Because the driver sets the SPI_MASTER_HALF_DUPLEX flag, the spi core
      will check transfers to insure they are not full duplex.  It's not
      necessary to check that in the spi-mxs driver as well.
      Signed-off-by: NTrent Piepho <tpiepho@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      210f65fe
    • T
      spi: spi-mxs: Fix chip select control bits in DMA mode · 0b782f70
      Trent Piepho 提交于
      In DMA mode the chip select control bits would be ORed into the CTRL0
      register without first clearing the bits.  This means that after
      addressing slave 1, the CTRL0 bit to address slave 1 would be still be
      set when addressing slave 0, resulting in slave 1 continuing to be
      addressed.
      
      The message handling function would pass the CS value to the txrx
      function, which would re-program the bits on each transfer in the
      message.  The selected CS does not change during a message so this is
      inefficient.  It also means there are two different sets of code for
      selecting the CS, one for PIO that worked and one for DMA that didn't.
      
      Change the code to set the CS bits in the message handling function
      once.  Now the DMA and PIO txrx functions don't need to care about CS
      at all.
      Signed-off-by: NTrent Piepho <tpiepho@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      0b782f70
    • T
      spi: spi-mxs: Fix extra CS pulses and read mode in multi-transfer messages · df23286e
      Trent Piepho 提交于
      There are two bits which control the CS line in the CTRL0 register:
      LOCK_CS and IGNORE_CRC.  The latter would be better named DEASSERT_CS
      in SPI mode.
      
      Setting DEASSERT_CS causes CS to be de-asserted at the end of the transfer.
      It should normally be set only for the final segment of the final transfer.
      The DMA code explicitly sets it in this case, but because it never clears
      the bit from the ctrl0 register, it will remain set for all transfers in
      subsequent messages.  This results in a CS pulse between transfers.
      
      There is a similar problem with the read mode bit never being cleared
      in DMA mode.
      
      This patch fixes DEASSERT_CS and READ being left on in DMA mode.
      Signed-off-by: NTrent Piepho <tpiepho@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      df23286e
    • T
      spi: spi-mxs: Change flag arguments in txrx functions to bit flags · 28cad125
      Trent Piepho 提交于
      There are three flag arguments to the PIO and DMA txrx functions.  Two
      are passed as pointers to integers, even though they are input only
      and not modified, which makes no sense to do.  The third is passed as
      an integer.
      
      The compiler must use an argument register or stack variable for each
      flag this way.  Using bitflags in a single flag argument is more
      efficient and produces smaller code, since all the flags can fit in a
      single register.  And all the flag arguments get cumbersome,
      especially when more are added for things like GPIO chipselects.
      
      The "first" flag is never used, so can just be deleted.
      
      The "last" flag is renamed to DEASSERT_CS, since that's really what it
      does.  The spi_transfer cs_change flag means that CS might be
      de-asserted on a transfer which is not last and not de-assert on the
      last transfer, so it is not which transfer is the last we need to know
      but rather the transfers after which CS should be de-asserted.
      
      This also extends the driver to not ignore cs_change when setting the
      DEASSERT_CS nee "last" flag.
      Signed-off-by: NTrent Piepho <tpiepho@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      28cad125
    • T
      spi: spi-mxs: Always clear INGORE_CRC, to keep CS asserted · 75e73fa2
      Trent Piepho 提交于
      INGORE_CRC, better named DEASSERT_CS, should be cleared on all tranfers
      except the last.  So instead of only clearing it on the first transfer, we
      can just always clear it.  It will set on the last transfer.
      
      This removes the only use of the "first" flag in the transfer functions, so
      that flag can be then be removed.
      Signed-off-by: NTrent Piepho <tpiepho@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      75e73fa2
    • T
      spi: spi-mxs: Remove mxs_spi_enable and mxs_spi_disable · f5bc7384
      Trent Piepho 提交于
      These functions consist of nothing but one single writel call and are
      only called once.  And the names really aren't accurate or clear,
      since they don't enable or disble SPI.  Rather they set the bit that
      controls the state of CS at the end of transfer.  It easier to follow
      the code to just set this bit with a writel() along with all the other
      bits being set in the same function.
      Signed-off-by: NTrent Piepho <tpiepho@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      f5bc7384
    • T
      spi: spi-mxs: Always set LOCK_CS · 58f46e41
      Trent Piepho 提交于
      There are two bits which control the CS line in the CTRL0 register:
      LOCK_CS and IGNORE_CRC.  The latter would be better named DEASSERT_CS
      in SPI mode.
      
      LOCK_CS keeps CS asserted though the entire transfer.  This should
      always be set.  The DMA code will always set it, explicitly on the
      first segment of the first transfer, and then implicitly on all the
      rest by never clearing the bit from the value read from the ctrl0
      register.
      
      The PIO code will explicitly set it for the first transfer, leave it
      set for intermediate transfers, and then clear it for the final
      transfer.  It should not clear it.
      
      The only reason to not set LOCK_CS would be to attempt an altered
      protocol where CS pulses between each word.  Though don't get your
      hopes up if you want to do this, as the hardware doesn't appear to do
      this in any sane manner.  It appears to be related to the hardware
      FIFO fill level.
      
      The code can be simplified by just setting LOCK_CS once and then not
      needing to deal with it at all in the PIO and DMA transfer functions.
      Signed-off-by: NTrent Piepho <tpiepho@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      58f46e41
    • K
      spi/s3c64xx: Add missing pm_runtime_put on setup fail · 7b8f7eef
      Krzysztof Kozlowski 提交于
      pm_runtime_put() wasn't called if clock rate could not be set up in
      s3c64xx_spi_setup() leading to invalid count of device pm_runtime usage.
      Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
      Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      7b8f7eef
    • K
      spi/s3c64xx: Add missing pm_runtime_set_active() call in probe() · 38338250
      Krzysztof Kozlowski 提交于
      Mark device as PM runtime active during initialization to reflect
      actual device power/clocks state. This reduces the enable count for SPI
      bus controller gate clock so it can be disabled when the bus controller
      is not used.
      Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
      Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
      Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      38338250
  9. 17 10月, 2013 6 次提交
  10. 15 10月, 2013 7 次提交