This allows pause_on_oops and mtdoops to work.
Signed-off-by: NNathan Lynch <ntl@pobox.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2810/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Octeon2 processor cores have a UserLocal register.  Remove the hard
coded negative probe and allow the standard probing to detect this
feature.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2578/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

For the case PM_DEFAULT_MASK == 0, we were placing a branch in the
delay slot of another branch.  This leads to undefined behavior.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2775/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Reported-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/2753/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Current Octeon systems do in fact have holes in their memory zones.
We need to select HOLES_IN_ZONE.  If we do not, some memory
configurations will result in crashes at boot time like this:

.
.
.
CPU 6 Unable to handle kernel paging request at virtual address 0000000000700000, epc == ffffffff8118fe00, ra == ffffffff8118fe9c
Oops[#1]:
Cpu 6
.
.
.
        ...
Call Trace:
[<ffffffff8118fe00>] setup_per_zone_wmarks+0x1b0/0x338
[<ffffffff815cd738>] init_per_zone_wmark_min+0x64/0xd0
[<ffffffff81100438>] do_one_initcall+0x38/0x160
.
.
.
Reported-by: NJason Kwon <jason.kwon@ericsson.com>
Signed-off-by: NDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Cc: Jason Kwon <jason.kwon@ericsson.com>
Patchwork: https://patchwork.linux-mips.org/patch/2724/
Tested-by: Guenter Roeck<guenter.roeck@ericsson.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Convert some MIPS architecture's code to using struct syscore_ops
objects for power management instead of sysdev classes and sysdevs.

This simplifies the code and reduces the kernel's memory footprint.
It also is necessary for removing sysdevs from the kernel entirely in
the future.
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
Acked-by: NGreg Kroah-Hartman <gregkh@suse.de>
Acked-and-tested-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Cc: linux-kernel@vger.kernel.org
Cc: "Rafael J.  Wysocki" <rjw@sisk.pl>
Patchwork: http://patchwork.linux-mips.org/patch/2431/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

We can't trust userspace to pass signed-extend arguments.  Not correctly
sign-extended arguments to futex-wait result in architecturally undefined
operation of 32-bit arithmetic instructions.

For example, if 'val' is too big and bit-31 is 1, the caller may enter
endless loop at:

futex_wait_setup()
{
	...

	if (uval != val) {
		queue_unlock(q, *hb);
		ret = -EWOULDBLOCK;

	...
}
Signed-off-by: NYong Zhang <yong.zhang@windriver.com>
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2714/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Usage of these flags has been deprecated for nearly 4 years by:

    commit f77bf014
    Author: Sam Ravnborg <sam@neptun.(none)>
    Date:   Mon Oct 15 22:25:06 2007 +0200

        kbuild: introduce ccflags-y, asflags-y and ldflags-y

Moreover, these flags (at least EXTRA_CFLAGS) have been documented for command
line use. By default, gmake(1) do not override command line setting, so this is
likely to result in build failure or unexpected behavior.

Replace their usage by Kbuild's `{as,cc,ld}flags-y'.

To: linux-kernel@vger.kernel.org
Cc: Sam Ravnborg <sam@ravnborg.org>
Patchwork: https://patchwork.linux-mips.org/patch/2710/
Cc: linux-mips@linux-mips.org
Signed-off-by: NArnaud Lacombe <lacombar@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Disable the cascade IRQ in the cascade handler.  This is required to
get the DB1300 working, and also gets rid of all spurious interrupts
previously observed on the DB1200; so Config[OD] can be disabled
again for better performance.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2708/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The bits used to set the PCI bus speed on AR9 are slightly different to
those used on Danube.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2614/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The irq base offset needs to be ignored when matching irqs to external
interrupt pins. Taking the offset into account resulted in the EIU not
being brought up properly.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2616/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Only some GCC versions such as gcc 4.2 notice that the variable wr in
build_r3000_tlb_modify_handler is used uninitialized.  When using one
of those GCCs the build will fail due to -Werror.  GCC 4.6 does not
warn about the uninitialized use of wr.

This issue was introduced by 7211f4d7a3dcbe57c5d396c334dca525315dceb2
[MIPS: Close races in TLB modify handlers.]
Reported-by: NGanesan Ramalingam <ganesan18@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The current code forgets the Au1100 when looking for the correct method to
suspend the chip.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2675/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Harmless typo which prints an error message although MAC0 was registered
successfully.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2672/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

  CC      arch/mips/pmc-sierra/msp71xx/msp_irq.o
/home/ralf/src/linux/linux-mips/arch/mips/pmc-sierra/msp71xx/msp_irq.c:112:2: error: request for member ‘flags’ in something not a structure or union
/home/ralf/src/linux/linux-mips/arch/mips/pmc-sierra/msp71xx/msp_irq.c:118:2: error: request for member ‘flags’ in something not a structure or union
make[4]: *** [arch/mips/pmc-sierra/msp71xx/msp_irq.o] Error 1

caused by 57336bc1056798d89714b7fb1b1d197e6bda6819 [MIPS: Mark cascade and
low level interrupts IRQF_NO_THREAD].

Commas to separate struct initializers generally are considered useful to
enhance the compilation experience of the user.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

do_signal() does __put_user() which can fault, resulting in a might_sleep()
warning in down_read(&mm->mmap_sem) and a "scheduling while atomic" warning
when mmap_sem is contented. On Swarm this also results in:

WARNING: at kernel/smp.c:459 smp_call_function_many+0x148/0x398()
Modules linked in:
Call Trace:

[<ffffffff804b48a4>] dump_stack+0x1c/0x50
[<ffffffff8013dc94>] warn_slowpath_common+0x8c/0xc8
[<ffffffff8013dcfc>] warn_slowpath_null+0x2c/0x40
[<ffffffff801864a0>] smp_call_function_many+0x148/0x398
[<ffffffff80186748>] smp_call_function+0x58/0xa8
[<ffffffff80119b5c>] r4k_flush_data_cache_page+0x54/0xd8
[<ffffffff801f39bc>] handle_pte_fault+0xa9c/0xad0
[<ffffffff801f40d0>] handle_mm_fault+0x158/0x200
[<ffffffff80115548>] do_page_fault+0x218/0x3b0
[<ffffffff80102744>] ret_from_exception+0x0/0x10
[<ffffffff8010eb18>] copy_siginfo_to_user32+0x50/0x298
[<ffffffff8010edf0>] setup_rt_frame_32+0x90/0x250
[<ffffffff80106414>] do_notify_resume+0x154/0x358
[<ffffffff80102930>] work_notifysig+0xc/0x14

Fixed by enabling interrupts in do_notify_resume before delivering signals.

[ralf@linux-mips.org: Reported and original fix by tglx but I wanted to
minimize the amount of code being run with interrupts disabled so I moved
the local_irq_disable() call right into do_notify_resume.  Which is saner
than doing it in entry.S.]
Reported-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

All low level interrupts have been marked NO_THREAD, so MIPS can enjoy
the wonderful world of forced threaded interrupt handlers.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2639/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Cascade interrupts cannot be threaded.
Signed-off-by: NLiming Wang <liming.wang@windriver.com>
Signed-off-by: NBruce Ashfield <bruce.ashfield@windriver.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1314370804-21266-1-git-send-email-liming.wang@windriver.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2770/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

There are two cascade interrupts in Loongson machines, one for bonito
northbridge, another for the 8259A controller in the southbridge. Both
want to be non threaded.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/2638/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Mark interrupts with no_action handler, cascade interrupts, low level
interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them
from forced threading.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

On preempt-rt this lock needs to be raw, so it does not get converted
to a sleeping spinlock. Trying to sleep in a panic is not really
desireable.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2636/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

arch/mips/kernel/ftrace.c: In function ‘ftrace_get_parent_ra_addr’:
arch/mips/kernel/ftrace.c:212: error: implicit declaration of function ‘in_kernel_space’
arch/mips/kernel/ftrace.c: In function ‘prepare_ftrace_return’:
arch/mips/kernel/ftrace.c:314: error: ‘MCOUNT_OFFSET_INSNS’ undeclared (first use in this function)
arch/mips/kernel/ftrace.c:314: error: (Each undeclared identifier is reported only once
arch/mips/kernel/ftrace.c:314: error: for each function it appears in.)
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2634/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

arch/mips/pci/pci-rc32434.c: In function 'rc32434_pci_init':
arch/mips/pci/pci-rc32434.c:217:16: error: 'rcrc32434_res_pci_io1' undeclared (first use in this function)
arch/mips/pci/pci-rc32434.c:217:16: note: each undeclared identifier is reported only once for each function it appears in
make[1]: *** [arch/mips/pci/pci-rc32434.o] Error 1

This problem is included in the following commit.

  commit 28f65c11
  Author: Joe Perches <joe@perches.com>
  Date:   Thu Jun 9 09:13:32 2011 -0700

      treewide: Convert uses of struct resource to resource_size(ptr)
Signed-off-by: NYoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: Joe Perches <joe@perches.com>
Patchwork: https://patchwork.linux-mips.org/patch/2654/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It was pointed out by 'make versioncheck' that some includes of
linux/version.h are not needed in arch/mips/.
This patch removes them.
Signed-off-by: NJesper Juhl <jj@chaosbits.net>
To: LKML <linux-kernel@vger.kernel.org>
Cc: trivial@kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2540/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Fix checkpatch warnings.  Rename arch_get_unmapped_area_foo() to
arch_get_unmapped_area_common().  Make indentations and spacing more
consistent.  Add <linux/compiler.h> for likely/unlikely.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Cc: Jian Peng <jipeng2005@gmail.com>
Cc: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2506/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The comment for the slave PIC is changed from 8259A-1 to 8259A-2.
Signed-off-by: NHillf Danton <dhillf@gmail.com>
To:  LKML <linux-kernel@vger.kernel.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2693/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

If we could find tc on the tc list for @index, the found tc should be returned.
Signed-off-by: NHillf Danton <dhillf@gmail.com>
To: LKML <linux-kernel@vger.kernel.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2692/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The nfsservctl system call is now gone, so we should remove all
linkage for it.
Signed-off-by: NNeilBrown <neilb@suse.de>
Signed-off-by: NJ. Bruce Fields <bfields@redhat.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

After changing all consumers of atomics to include <linux/atomic.h>, we
ran into some compile time errors due to this dependency chain:

linux/atomic.h
  -> asm/atomic.h
    -> asm-generic/atomic-long.h

where atomic-long.h could use funcs defined later in linux/atomic.h
without a prototype.  This patches moves the code that includes
asm-generic/atomic*.h to linux/atomic.h.

Archs that need <asm-generic/atomic64.h> need to select
CONFIG_GENERIC_ATOMIC64 from now on (some of them used to include it
unconditionally).

Compile tested on i386 and x86_64 with allnoconfig.
Signed-off-by: NArun Sharma <asharma@fb.com>
Cc: Eric Dumazet <eric.dumazet@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: David Miller <davem@davemloft.net>
Acked-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This is in preparation for more generic atomic primitives based on
__atomic_add_unless.
Signed-off-by: NArun Sharma <asharma@fb.com>
Signed-off-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Reviewed-by: NEric Dumazet <eric.dumazet@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: David Miller <davem@davemloft.net>
Acked-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This allows us to move duplicated code in <asm/atomic.h>
(atomic_inc_not_zero() for now) to <linux/atomic.h>
Signed-off-by: NArun Sharma <asharma@fb.com>
Reviewed-by: NEric Dumazet <eric.dumazet@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: David Miller <davem@davemloft.net>
Cc: Eric Dumazet <eric.dumazet@gmail.com>
Acked-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Page table entries are made invalid by writing a zero into the the PTE
slot in a page table.  This creates a race condition with the TLB
modify handlers when they are updating the PTE.

CPU0                              CPU1

Test for _PAGE_PRESENT
.                                 set to not _PAGE_PRESENT (zero)
Set to _PAGE_VALID

So now the page not present value (zero) is suddenly valid and user
space programs have access to physical page zero.

We close the race by putting the test for _PAGE_PRESENT and setting of
_PAGE_VALID into an atomic LL/SC section.  This requires more registers
than just K0 and K1 in the handlers, so we need to save some registers
to a save area and then restore them when we are done.

The save area is an array of cacheline aligned structures that should
not suffer cache line bouncing as they are CPU private.

[ralf@linux-mips.org: Fix !defined(CONFIG_MIPS_PGD_C0_CONTEXT) build error.]
Signed-off-by: NDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2577/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This can be used from either 32-bit or 64-bit code to generate logical
right shifts of any constant amount.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2576/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Remove custom implementation of hex_to_bin().
Signed-off-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1580/Acked-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Enable cpu_has_clo_clz only when CONFIG_CPU_MIPS32 or CONFIG_CPU_MIPS64
is selected.  This will optimize fls() and __fls() to use CLZ insn, and
eventually ffs() and __ffs() as well.

Malta and MIPSSim are development platforms, and need to take care of
various processor configurations, release rivisions and so on, even
across different MIPS ISAs.  For such platforms we have to be careful,
for instance, with turning on cpu_has_mips{32,64}r[12] features.

As for CLZ, all MIPS32/64 processors support it, regardless of release
revisions.
Signed-off-by: NShinya Kuribayashi <skuribay@pobox.com>
To: David VomLehn <dvomlehn@cisco.com>
To: macro@linux-mips.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1453/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This will optimize fls() and __fls() to use CLZ throughout the kernel,
and any other optimizations that depend on constant cpu_has_* values
will also be used.
Signed-off-by: NDavid VomLehn <dvomlehn@cisco.com>
Signed-off-by: NShinya Kuribayashi <skuribay@pobox.com>
To: David VomLehn <dvomlehn@cisco.com>
To: macro@linux-mips.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1452/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
To: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2391/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

fixrange_init() allocates page tables for all addresses higher than
FIXADDR_TOP.  On processors that override the default FIXADDR_TOP
address of 0xfffe_0000, this can consume up to 4 pages (1 page per 4MB)
for pgd's that are never used.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1980/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

BMIPS4350/4380/5000 CMT/SMT all use SW INT0/INT1 for inter-thread
signaling.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1709/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Memory maps and addressing quirks are normally defined in <spaces.h>.
There are already three targets that need to override FIXADDR_TOP, and
others exist.  This will be a cleaner approach than adding lots of
ifdefs in fixmap.h .
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Cc: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1573/Acked-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>