- 27 4月, 2016 1 次提交
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由 Geert Uytterhoeven 提交于
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 25 4月, 2016 1 次提交
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由 Wolfram Sang 提交于
The wrong values come from an old datasheet (H2 v0.6). Anything later has the fixed value of 195MHz (H2 v0.7 up to Gen2-common V2.0). Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 21 4月, 2016 1 次提交
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由 Ben Hutchings 提交于
Taken from the datasheet. Signed-off-by: NBen Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 20 4月, 2016 5 次提交
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由 Simon Horman 提交于
Use recently added fallback compatibility string in r8a7790 device tree. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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由 Simon Horman 提交于
Use recently added fallback compatibility string in r8a7790 device tree. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Based on Rev. 2.00 of the R-Car Gen2 datasheet. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
Use recently added fallback compatibility string in r8a7790 device trees. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 28 3月, 2016 1 次提交
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由 Simon Horman 提交于
* Fixed rate and fixed factor clocks do not require an clock-output-names property. * Since 07705583 ("clk: shmobile: div6: Make clock-output-names optional") Renesas div6 clocks do not require a clock-output-names property. In the above cases there is only one clock output and its name is taken from that of the clock node. Accordingly, remove the unnecessary clock-output-names properties and as necessary the nodes. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 25 2月, 2016 1 次提交
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由 Simon Horman 提交于
Use recently added fallback compatibility string in r8a7790 device tree. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 19 2月, 2016 1 次提交
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由 Geert Uytterhoeven 提交于
Add device nodes for the L2 caches, and link the CPU nodes to them. The L2 cache for the Cortex-A15 CPU cores is 2 MiB large (organized as 128 KiB x 16 ways). The L2 cache for the Cortex-A7 CPU cores is 512 KiB large (organized as 64 KiB x 8 ways). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 16 2月, 2016 1 次提交
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由 Kuninori Morimoto 提交于
This patch enables to use thermal-zone on r8a7790. This thermal sensor can measure temperature from -40000 to 125000, but over 117000 can be critical on this chip. Thus, default critical temperature is now set as 115000 (this driver is using 5000 steps) (Current critical temperature is using it as 90000, but there is no big reason about it) And it doesn't check thermal zone periodically (same as current behavior). You can exchange it by modifying polling-delay[-passive] property. You can set trip temp if your kernel has CONFIG_THERMAL_WRITABLE_TRIPS, but you need to take care to use it, since it will call orderly_poweroff() it it reaches to the value. echo $temp > /sys/class/thermal/thermal_zone0/trip_point_0_temp Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 15 2月, 2016 2 次提交
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由 Simon Horman 提交于
Use recently added fallback compatibility string in r8a7790 device tree. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
Use recently added fallback compatibility string in r8a7790 device tree. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 10 2月, 2016 3 次提交
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由 Geert Uytterhoeven 提交于
Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depends on the actual board. Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF and HSCIF device nodes. This increases the range and accuracy of supported baud rates on (H)SCIF. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 25 1月, 2016 2 次提交
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由 Simon Horman 提交于
Use GIC_* defines for GIC interrupt cells in r8a7791 device tree. Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
Use recently added fallback compatibility string in r8a7790 device tree. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 17 12月, 2015 1 次提交
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由 Simon Horman 提交于
Use recently SoC-specific compatibility strings in r8a779[01] device trees. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 15 12月, 2015 2 次提交
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由 Magnus Damm 提交于
Update IPMMU compat strings to include SoC part number. By specifying SoC part number in DT it becomes possible to implement SoC specific features in the IPMMU driver. Signed-off-by: NMagnus Damm <damm+renesas@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Wolfram Sang 提交于
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 18 11月, 2015 1 次提交
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由 Simon Horman 提交于
Use the new SoC specific binding for rcar-dmac and the generic binding as a fall-back in the r8a7790 device tree. In general Renesas hardware is not documented to the extent where the relationship between IP blocks on different SoCs can be assumed although they may appear to operate the same way. Furthermore the documentation typically does not specify a version for individual IP blocks. For these reasons a convention of using the SoC name in place of a version and providing SoC-specific compat strings has been adopted. Although not universally liked this convention is used in the bindings for most drivers for Renesas hardware. The purpose of this patch is to update the Renesas R-Car DMA Controller nodes to follow this convention. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 23 10月, 2015 1 次提交
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由 Sergei Shtylyov 提交于
On R8A7790, GPIO banks 1 and 2 are missing pins 30 and 31. Correct the "gpio-ranges" properties of the corresponding device nodes. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 29 9月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
484adb00 ("ARM: shmobile: r8a7790 dtsi: Add CPG/MSTP Clock Domain") added CPG/MSTP clock-cells domain support, but it was missing sound support. This patch adds it. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Tested-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> [horms: Updated commit id referred to in changelog] Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 14 9月, 2015 1 次提交
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 12 8月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
Add an appropriate "#power-domain-cells" property to the cpg_clocks device node, to create the CPG/MSTP Clock Domain. Add "power-domains" properties to all device nodes for devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock. This applies to most on-SoC devices, which have a one-to-one mapping from SoC device to DT device node. Notable exceptions are the "display" and "sound" nodes, which represent multiple SoC devices, each having their own MSTP clocks. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 28 7月, 2015 1 次提交
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由 Mikhail Ulyanov 提交于
This patch contains device tree node definition for JPEG codec peripheral found in the Renesas R-Car r8a7790 SoC. Signed-off-by: NMikhail Ulyanov <mikhail.ulyanov@cogentembedded.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 22 7月, 2015 2 次提交
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NKeita Kobayashi <keita.kobayashi.ym@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NKeita Kobayashi <keita.kobayashi.ym@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 06 7月, 2015 3 次提交
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由 Geert Uytterhoeven 提交于
Replace the "arm,cortex-a15-gic" compatible value for the GIC by "arm,gic-400", as the R-Car Gen2 GIC is assumed to be a GIC-400. This has been confirmed by reading the GICD_IIDR register (on r8a7791), which reports 0x0200043b (GIC-400 = 0x02, ARM = 0x43b). This has no effect on runtime behavior, as currently the GIC driver treats both compatible values the same. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Sergei Shtylyov 提交于
Define the generic R8A7790 part of the EtherAVB device node. Based on original patch by Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Sergei Shtylyov 提交于
Add the EtherAVB clock to the R8A7790 device tree. Based on original patch by Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 26 5月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
Add DMA properties to all SCIF, SCIFA, SCIFB, and HSCIF device nodes. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 25 5月, 2015 2 次提交
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NKeita Kobayashi <keita.kobayashi.ym@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Add DMA properties to all SCIF, SCIFA, SCIFB, and HSCIF device nodes. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 12 5月, 2015 2 次提交
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由 Yoshihiro Shimoda 提交于
This patch adds DMA properties to the HSUSB node. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Yoshihiro Shimoda 提交于
Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 11 5月, 2015 2 次提交
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由 Geert Uytterhoeven 提交于
rcar_sound -> sound Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Link the external IRQ controller irqc0 to the IRQC module clock, so it can be power managed using that clock. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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