- 03 8月, 2010 1 次提交
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由 Ian Lartey 提交于
The WM8741 is a very high performance stereo DAC designed for audio applications such as professional recording systems, A/V receivers and high specification CD, DVD and home theatre systems. The device supports PCM data input word lengths from 16 to 32-bits and sampling rates up to 192kHz. The WM8741 also supports DSD bit-stream data format, in both direct DSD and PCM-converted DSD modes. TODO: Expand wm8741_set_dai_sysclk and rate_constraint members to allow for all supported sample rate / Master Clock frequency combinations. Fully enable control of supplies. Signed-off-by: NIan Lartey <ian@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 29 7月, 2010 2 次提交
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由 Peter Ujfalusi 提交于
Platform parameter to enable automatic FIFO configuration when the codec is in Mode1 or Mode7 FIFO mode. When this mode is selected, the controls for changing nSample (in Mode1), and UTHR (in Mode7) are not added. The driver configures the FIFO configuration based on the stream's period size in a way, that every burst will read period size of data from the host. In Mode7 we need to use a formula, which gives close enough aproximation for the burst length from the host point of view. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
Replace the hardwired latency definition with platform data parameter, and simplify the nSample parameter calculation. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 27 7月, 2010 1 次提交
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由 Peter Ujfalusi 提交于
There is no need to handle POST_PMU, POST_PMD event with the Capture Route widget. It is enough to handle POST_REG event, since that will come when the user changes the routing, and we will switch the needed bits in the registers. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 23 7月, 2010 1 次提交
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由 Kuninori Morimoto 提交于
HeadPhone Playback Volume control register of DA7210 has reserved area. This patch considered it as mute. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 21 7月, 2010 1 次提交
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由 Peter Ujfalusi 提交于
When digital microphones are connected to twl, delay is needed after enabling the digimic interface of the codec. Add new parameter for the setup data, which can be used to pass the apropriate delay in ms after the digimic interface has been enabled. Without certain delay (in certain HW configuration) the beggining of the recorded sample contains a glitch, which is generated by the digital microphones. Delaying the micbias1, 2 (which is the bias for the digimic0 or 1) does not help, since the glitch is coming after switching the digimic interface. Reversing the micbias and digimic enable order does not work either (in that case the wait need to be added after the micbias enabled). Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 20 7月, 2010 4 次提交
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由 Mark Brown 提交于
AIF1ADC TDM mode has no effect other than causing the ADCDAT line to be tristated rather than driven low on clock cycles where there is no data to be transmitted. If the clock cycle is idle then there should be no devices using the data so tristating should have no adverse effects. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Chanwoo Choi 提交于
Otherwise all machine drivers need to do so. Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com> Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 18 7月, 2010 2 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Cc: stable@kernel.org
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由 Jorge Eduardo Candelaria 提交于
In order to reduce pop-noise at powering up/down of the DACs and Drivers, these components have to be handled in a specific sequence. Headset, Handsfree, and Earphone drivers are now registered as PGA components to ensure DACs are enabled first. Also, add a delay to leave time for DACs to settle before continuing power up/down sequence. Signed-off-by: NJorge Eduardo Candelaria <jorge.candelaria@ti.com> Signed-off-by: NMargarita Olaya Cabrera <magi.olaya@ti.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 15 7月, 2010 2 次提交
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由 Axel Lin 提交于
snd_soc_unregister_codec is called twice if snd_soc_register_dai fail. Signed-off-by: NAxel Lin <axel.lin@gmail.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Axel Lin 提交于
otherwise the error path will always be executed. Signed-off-by: NAxel Lin <axel.lin@gmail.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 13 7月, 2010 2 次提交
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由 Peter Ujfalusi 提交于
Restructure the DAPM connections in order to enable only the needed DAC (out of four in twl4030 series). I need to keep the 'AIF Enable' supply connected to the L2/R2 digital path, since the digital loopback needs AIF and APLL running. If no valid route available, than none of the DAC will be powered, but the AIF and APLL is going to be enabled. Furthermore, if only one audio path have valid route, than only the corresponding DAC will be powered. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsomicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
When the gain is configured using dB value it was not possible to use -24dB since the loopback got muted instead of -24dB. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsomicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 09 7月, 2010 2 次提交
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由 Mark Brown 提交于
The WM8994 can output a clock derived from its internal SYSCLK, called OPCLK. The rate can be selected as a sysclk, with a division from the SYSCLK rate specified (multiplied by 10 since a division of 5.5 is supported) and the clock can be disabled by specifying a divisor of zero. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
Very handy for debug. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 06 7月, 2010 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 05 7月, 2010 2 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
It will be replaced with automatic deemphasis rate configuration but since we have an enumeration table in this driver this is done in a separate commit to make the renumbering of the enumeration items clear. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 04 7月, 2010 1 次提交
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由 Maurus Cuelenaere 提交于
The WM8987 codec is register compatible with the WM8750, so just add it to the SPI and I²C device table. Signed-off-by: NMaurus Cuelenaere <mcuelenaere@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 02 7月, 2010 1 次提交
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 30 6月, 2010 2 次提交
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由 Vladimir Zapolskiy 提交于
For UDA1341 codec power control is managed in STATUS1 register, and for all other codecs in DATA011 register. Signed-off-by: NVladimir Zapolskiy <vzapolskiy@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Vladimir Zapolskiy 提交于
In UDA1340, UDA1344 and UDA1345 codecs there is one more functional register in part of DATA0 tranfser. For UDA1341 this register coincides with EA register. Signed-off-by: NVladimir Zapolskiy <vzapolskiy@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 25 6月, 2010 2 次提交
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由 Vladimir Zapolskiy 提交于
On initialization ADC/DAC are enabled only for UDA1341, that's why bias_level shall be set to off explicitly, otherwise dapm is misinformed about bias_level on startup. Signed-off-by: NVladimir Zapolskiy <vzapolskiy@gmail.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Vladimir Zapolskiy 提交于
This change wipes out a hardcoded macro, which enables codec bias level control. Now is_powered_on_standby value shall be used instead. Signed-off-by: NVladimir Zapolskiy <vzapolskiy@gmail.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 23 6月, 2010 2 次提交
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由 Eric Bénard 提交于
in tlv320aic23_set_bias_level, for the case SND_SOC_BIAS_ON, the comment says "vref/mid, osc on, dac unmute" but the code doesn't clear the corresponding bits, thus when resuming, several bits are not cleared preventing the codec from working. in tlv320aic23_suspend, clearing the active register is not needed as it will be done by tlv320aic23_set_bias_level, when setting bias to SND_SOC_BIAS_OFF Signed-off-by: NEric Bénard <eric@eukrea.com> Cc: broonie@opensource.wolfsonmicro.com Cc: anuj.aggarwal@ti.com Cc: lrg@slimlogic.co.uk Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Lars-Peter Clausen 提交于
This patch adds support for the JZ4740 internal codec. Signed-off-by: NLars-Peter Clausen <lars@metafoo.de> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 20 6月, 2010 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 15 6月, 2010 3 次提交
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由 Mark Brown 提交于
The most useful configuration for the WM2000 is to enable the ANC so turn that on by default, and since we're not reflecting chip default state also enable the speaker output by default. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 07 6月, 2010 1 次提交
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由 Peter Ujfalusi 提交于
Upper threshold is used in mode7 of DAC33. Instead of hard wired UTHR, add control to change the upper threshold value. Changing upper threshold is not allowed when the playback is already running, since wrongly timed change in the UTHR can cause problems with the codec. With this control the length of the burst in mode7 can be changed. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 31 5月, 2010 6 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 apatard@mandriva.com 提交于
This patch is adding a ASoC driver for the cs42l51 from Cirrus Logic. Master mode and spi mode are not supported. Signed-off-by: NArnaud Patard <apatard@mandriva.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.ul> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Seungwhan Youn 提交于
This patch adds spdif dummy codec driver for using spdif-dit as a stand-alone. Until this, spdif-dit can be used only with other codecs like tlv320aci3x in davinci platform. Signed-off-by: NSeungwhan Youn <sw.youn@samsung.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Peter Ujfalusi 提交于
Machine driver can instruct the codec driver to reset the chip registers to their default values at probe time. If machine driver does not provide setup data, then the registers are going to be reseted to their defaults, to be safe. If the developer on the platform confirms that the register reset is not needed, than it can be skipped, saving ~20ms time in probe. As safety measure do the register reset at remove time also. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
Restructure the codec power code in order to be able to hit off when the codec is not in use. Since the audio registers are accessible while the codec is powered down, there is no need for additional safety mechanism. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
It seams at least on twl5031 that the ARXR2_APGA_CTL register does not have the same default value as it is written in the TRM. Since the codec part of the PM chip has not been actually changed according to TI, assuming, that all version has the same problem, so writing there the TRM value. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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