1. 24 2月, 2013 2 次提交
  2. 19 12月, 2012 1 次提交
  3. 29 3月, 2012 1 次提交
  4. 18 1月, 2012 1 次提交
  5. 26 7月, 2011 1 次提交
  6. 28 10月, 2010 2 次提交
  7. 13 3月, 2010 1 次提交
    • C
      xtensa: use generic ptrace_resume code · 6d75ca10
      Christoph Hellwig 提交于
      Use the generic ptrace_resume code for PTRACE_SYSCALL, PTRACE_CONT,
      PTRACE_KILL and PTRACE_SINGLESTEP.  This implies defining
      arch_has_single_step in <asm/ptrace.h> and implementing the
      user_enable_single_step and user_disable_single_step functions, which also
      causes the breakpoint information to be cleared on fork, which could be
      considered a bug fix.
      
      Also the TIF_SYSCALL_TRACE thread flag is now cleared on PTRACE_KILL which
      it previously wasn't which is consistent with all architectures using the
      modern ptrace code.
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      Cc: Oleg Nesterov <oleg@redhat.com>
      Cc: Roland McGrath <roland@redhat.com>
      Cc: Chris Zankel <chris@zankel.net>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      6d75ca10
  8. 14 2月, 2008 2 次提交
    • C
      [XTENSA] Allow debugger to modify the WINDOWBASE register. · 42086cec
      Chris Zankel 提交于
      For the 'return' command, GDB needs to adjust WINDOWBASE.
      In case WB is different from 0, we need to rotate the
      window register file and update WINDOWSTART and WMASK.
      This patch also removes some ret|= statements for
      __get_user/__put_user as the address range was alrady
      checked a couple of lines earlier.
      Signed-off-by: NChris Zankel <chris@zankel.net>
      42086cec
    • C
      [XTENSA] Add support for configurable registers and coprocessors · c658eac6
      Chris Zankel 提交于
      The Xtensa architecture allows to define custom instructions and
      registers. Registers that are bound to a coprocessor are only
      accessible if the corresponding enable bit is set, which allows
      to implement a 'lazy' context switch mechanism. Other registers
      needs to be saved and restore at the time of the context switch
      or during interrupt handling.
      
      This patch adds support for these additional states:
      
      - save and restore registers that are used by the compiler upon
        interrupt entry and exit.
      - context switch additional registers unbound to any coprocessor
      - 'lazy' context switch of registers bound to a coprocessor
      - ptrace interface to provide access to additional registers
      - update configuration files in include/asm-xtensa/variant-fsf
      Signed-off-by: NChris Zankel <chris@zankel.net>
      c658eac6
  9. 17 10月, 2007 1 次提交
  10. 18 7月, 2007 2 次提交
  11. 09 5月, 2007 1 次提交
  12. 11 12月, 2006 2 次提交
  13. 02 9月, 2006 1 次提交
  14. 01 7月, 2006 1 次提交
  15. 13 1月, 2006 1 次提交
  16. 07 11月, 2005 1 次提交
  17. 31 10月, 2005 1 次提交
  18. 30 6月, 2005 1 次提交
  19. 24 6月, 2005 1 次提交