1. 27 11月, 2007 8 次提交
    • R
      [MIPS] Only build r4k clocksource for systems that work ok with it. · 940f6b48
      Ralf Baechle 提交于
      In particular as-is it's not suited for multicore and mutiprocessors
      systems where there is on guarantee that the counter are synchronized
      or running from the same clock at all.  This broke Sibyte and probably
      others since the "[MIPS] Handle R4000/R4400 mfc0 from count register."
      commit.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      940f6b48
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      [MIPS] Handle R4000/R4400 mfc0 from count register. · 5aa85c9f
      Ralf Baechle 提交于
      The R4000 and R4400 have an errata where if the cp0 count register is read
      in the exact moment when it matches the compare register no interrupt will
      be generated.
      
      This bug may be triggered if the cp0 count register is being used as
      clocksource and the compare interrupt as clockevent.  So a simple
      workaround is to avoid using the compare for both facilities on the
      affected CPUs.
      
      This is different from the workaround suggested in the old errata documents;
      at some opportunity probably the official version should be implemented
      and tested.  Another thing to find out is which processor versions
      exactly are affected.  I only have errata documents upto R4400 V3.0
      available so for the moment the code treats all R4000 and R4400 as broken.
      
      This is potencially a problem for some machines that have no other decent
      clocksource available; this workaround will cause them to fall back to
      another clocksource, worst case the "jiffies" source.
      5aa85c9f
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      [MIPS] Fix possible hang in LL/SC futex loops. · 0f67e90e
      Ralf Baechle 提交于
      The LL / SC loops in __futex_atomic_op() have the usual fixups necessary
      for memory acccesses to userspace from kernel space installed:
      
              __asm__ __volatile__(
              "       .set    push                            \n"
              "       .set    noat                            \n"
              "       .set    mips3                           \n"
              "1:     ll      %1, %4  # __futex_atomic_op     \n"
              "       .set    mips0                           \n"
              "       " insn  "                               \n"
              "       .set    mips3                           \n"
              "2:     sc      $1, %2                          \n"
              "       beqz    $1, 1b                          \n"
              __WEAK_LLSC_MB
              "3:                                             \n"
              "       .set    pop                             \n"
              "       .set    mips0                           \n"
              "       .section .fixup,\"ax\"                  \n"
              "4:     li      %0, %6                          \n"
              "       j       2b                              \n"	<-----
              "       .previous                               \n"
              "       .section __ex_table,\"a\"               \n"
              "       "__UA_ADDR "\t1b, 4b                    \n"
              "       "__UA_ADDR "\t2b, 4b                    \n"
              "       .previous                               \n"
              : "=r" (ret), "=&r" (oldval), "=R" (*uaddr)
              : "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT)
              : "memory");
      
      The branch at the end of the fixup code, it goes back to the SC
      instruction, no matter if the fault was first taken by the LL or SC
      instruction resulting in an endless loop which will only terminate if
      the address become valid again due to another thread setting up an
      accessible mapping and the CPU happens to execute the SC instruction
      successfully which due to the preceeding ERET instruction of the fault
      handler would only happen if UNPREDICTABLE instruction behaviour of the
      SC instruction without a preceeding LL happens to favor that outcome.
      But normally processes are nice, pass valid arguments and we were just
      getting away with this.
      
      Thanks to Kaz Kylheku <kaz@zeugmasystems.com> for providing the original
      report and a test case.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      0f67e90e
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      [MIPS] Fix context DSP context / TLS pointer switching bug for new threads. · 07500b0d
      Ralf Baechle 提交于
      A new born thread starts execution not in schedule but rather in
      ret_from_fork which results in it bypassing the part of the code to
      load a new context written in C which are the DSP context and the
      userlocal register which Linux uses for the TLS pointer.  Frequently
      we were just getting away with this bug for a number of reasons:
      
       o Real world application scenarios are very unlikely to use clone or fork
         in blocks of DSP code.
       o Linux by default runs the child process right after the fork, so the
         child by luck will find all the right context in the DSP and userlocal
         registers.
       o So far the rdhwr instruction was emulated on all hardware so userlocal
         wasn't getting referenced at all and the emulation wasn't suffering
         from the issue since it gets it's value straight from the thread's
         thread_info.
      
      Fixed by moving the code to load the context from switch_to() to
      finish_arch_switch which will be called by newborn and old threads.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      07500b0d
    • R
      [MIPS] IP32: More interrupt renumbering fixes. · 98ce4721
      Ralf Baechle 提交于
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      98ce4721
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      [MIPS] time: MIPSsim's plat_time_init doesn't need to be irq safe. · 526a6770
      Ralf Baechle 提交于
      It's running early during the bootup process so interrupts are still off.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      526a6770
    • R
      aea68639
    • R
      [MIPS] Fix pcspeaker build. · cfb6f260
      Ralf Baechle 提交于
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      cfb6f260
  2. 18 11月, 2007 3 次提交
    • L
      Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86 · 2ffbb837
      Linus Torvalds 提交于
      * 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86:
        x86: simplify "make ARCH=x86" and fix kconfig all.config
        x86: reboot fixup for wrap2c board
        x86: check boundary in count setup resource
        x86: fix reboot with no keyboard attached
        x86: add hpet sanity checks
        x86: on x86_64, correct reading of PC RTC when update in progress in time_64.c
        x86: fix freeze in x86_64 RTC update code in time_64.c
        ntp: fix typo that makes sync_cmos_clock erratic
        Remove x86 merge artifact from top Makefile
        x86: fixup cpu_info array conversion
        x86: show cpuinfo only for online CPUs
        x86: fix cpu-hotplug regression
        x86: ignore the sys_getcpu() tcache parameter
        x86: voyager use correct header file name
        x86: fix smp init sections
        x86: fix voyager_cat_init section
        x86: fix bogus memcpy in es7000_check_dsdt()
      2ffbb837
    • S
      x86: simplify "make ARCH=x86" and fix kconfig all.config · 6840999b
      Sam Ravnborg 提交于
      Simplify "make ARCH=x86" and fix kconfig so we again can set 64BIT in
      all.config.
      
      For a fix the diffstat is nice:
       6 files changed, 3 insertions(+), 36 deletions(-)
      
      The patch reverts these commits:
       - 0f855aa6 ("kconfig: add helper to set
         config symbol from environment variable")
       - 2a113281 ("kconfig: use $K64BIT to
         set 64BIT with all*config targets")
      
      Roman Zippel pointed out that kconfig supported string compares so
      the additional complexity introduced by the above two patches were
      not needed.
      
      With this patch we have following behaviour:
      
        # make {allno,allyes,allmod,rand}config [ARCH=...]
        option \ host arch      | 32bit         | 64bit
        =====================================================
        ./.                     | 32bit         | 64bit
        ARCH=x86                | 32bit         | 32bit
        ARCH=i386               | 32bit         | 32bit
        ARCH=x86_64             | 64bit         | 64bit
      
      The general rule are that ARCH= and native architecture takes
      precedence over the configuration.
      
      So make ARCH=i386 [whatever] will always build a 32-bit kernel
      no matter what the configuration says.  The configuration will
      be updated to 32-bit if it was configured to 64-bit and the
      other way around.
      
      This behaviour is consistent with previous behaviour so no
      suprises here.
      
      make ARCH=x86 will per default result in a 32-bit kernel but as
      the only ARCH= value x86 allow the user to select between 32-bit
      and 64-bit using menuconfig.
      Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      Cc: Roman Zippel <zippel@linux-m68k.org>
      Cc: Andreas Herrmann <aherrman@arcor.de>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      6840999b
    • S
      x86: simplify "make ARCH=x86" and fix kconfig all.config · 80ef88d6
      Sam Ravnborg 提交于
      Simplify "make ARCH=x86" and fix kconfig so we again
      can set 64BIT in all.config.
      
      For a fix the diffstat is nice:
       6 files changed, 3 insertions(+), 36 deletions(-)
      
      The patch reverts these commits:
      0f855aa6
      -> kconfig: add helper to set config symbol from environment variable
      
      2a113281
      -> kconfig: use $K64BIT to set 64BIT with all*config targets
      
      Roman Zippel pointed out that kconfig supported string
      compares so the additional complexity introduced by the
      above two patches were not needed.
      
      With this patch we have following behaviour:
      
      # make {allno,allyes,allmod,rand}config [ARCH=...]
      option \ host arch      | 32bit         | 64bit
      =====================================================
      ./.                     | 32bit         | 64bit
      ARCH=x86                | 32bit         | 32bit
      ARCH=i386               | 32bit         | 32bit
      ARCH=x86_64             | 64bit         | 64bit
      
      The general rule are that ARCH= and native architecture
      takes precedence over the configuration.
      So make ARCH=i386 [whatever] will always build a 32-bit
      kernel no matter what the configuration says.
      The configuration will be updated to 32-bit if it was
      configured to 64-bit and the other way around.
      
      This behaviour is consistent with previous behaviour so
      no suprises here.
      
      make ARCH=x86 will per default result in a 32-bit kernel
      but as the only ARCH= value x86 allow the user to select
      between 32-bit and 64-bit using menuconfig. 
      Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      Cc: Roman Zippel <zippel@linux-m68k.org>
      Cc: Andreas Herrmann <aherrman@arcor.de>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      80ef88d6
  3. 17 11月, 2007 22 次提交
  4. 16 11月, 2007 7 次提交
    • L
      dirty page balancing: Get rid of broken unmapped_ratio logic · 8c086340
      Linus Torvalds 提交于
      This code harks back to the days when we didn't count dirty mapped
      pages, which led us to try to balance the number of dirty unmapped pages
      by how much unmapped memory there was in the system.
      
      That makes no sense any more, since now the dirty counts include the
      mapped pages.  Not to mention that the math doesn't work with HIGHMEM
      machines anyway, and causes the unmapped_ratio to potentially turn
      negative (which we do catch thanks to clamping it at a minimum value,
      but I mention that as an indication of how broken the code is).
      
      The code also was written at a time when the default dirty ratio was
      much larger, and the unmapped_ratio logic effectively capped that large
      dirty ratio a bit.  Again, we've since lowered the dirty ratio rather
      aggressively, further lessening the point of that code.
      Acked-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      8c086340
    • L
      Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6 · adea27f4
      Linus Torvalds 提交于
      * 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6:
        [NETFILTER]: Fix NULL pointer dereference in nf_nat_move_storage()
        [SUNHME]: VLAN support for sunhme
        [CHELSIO]: Fix skb->dev setting.
        [NETFILTER]: fix compat_nf_sockopt typo
        [INET]: Fix potential kfree on vmalloc-ed area of request_sock_queue
        [VIA_VELOCITY]: Don't oops on MTU change.
        iwl4965: fix not correctly dealing with hotunplug
        rt2x00: Fix chipset revision validation
        iwl3945: place CCK rates in front of OFDM for supported rates
        mac80211: Fix queuing of scan containing a SSID
      adea27f4
    • L
      Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus · 40787d00
      Linus Torvalds 提交于
      * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
        [MIPS] N32 needs to use the compat version of sys_nfsservctl.
        [MIPS] irq_cpu: use handle_percpu_irq handler to avoid dropping interrupts.
        [MIPS] Sibyte: Fix name of clocksource.
        [MIPS] SNI: s/achknowledge/acknowledge/
        [MIPS] Makefile: Fix canonical system names
        [MIPS] vpe: handle halting TCs in an errata safe way.
        [MIPS] Sibyte: Stop timers before programming next even.
        [MIPS] Sibyte: Increase minimum oneshot timer interval to two ticks.
        [MIPS] Lasat: Fix overlap of interrupt number ranges.
        [MIPS] SNI PCIT CPLUS: workaround for b0rked irq wiring of onboard PCI bus 1
        [MIPS] Fix shadow register support.
        [MIPS] Change get_cycles to always return 0.
        [MIPS] Fix typo in R3000 TRACE_IRQFLAGS code
        [MIPS] Sibyte: Replace use of removed IO_SPACE_BASE with IOADDR.
        [MIPS] iounmap if in vr41xx_pciu_init() pci clock is over 33MHz
        [MIPS] BCM1480: Remove duplicate acknowledge of timer interrupt.
        [MIPS] Sibyte: pin timer interrupt to their cores.
        [MIPS] Qemu: Add early printk, your friend in a cold night.
        [MIPS] Convert reference to mem_map to pfn_to_page().
        [MIPS] Sibyte: resurrect old cache hack.
      40787d00
    • E
      [NETFILTER]: Fix NULL pointer dereference in nf_nat_move_storage() · 77996525
      Evgeniy Polyakov 提交于
      Reported by Chuck Ebbert as:
      
      	https://bugzilla.redhat.com/show_bug.cgi?id=259501#c14
      
      This routine is called each time hash should be replaced, nf_conn has
      extension list which contains pointers to connection tracking users
      (like nat, which is right now the only such user), so when replace takes
      place it should copy own extensions. Loop above checks for own
      extension, but tries to move higer-layer one, which can lead to above
      oops.
      Signed-off-by: NEvgeniy Polyakov <johnpol@2ka.mipt.ru>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      77996525
    • C
      [SUNHME]: VLAN support for sunhme · a5a97263
      Chris Poon 提交于
      This patch enables VLAN support on sunhme by increasing BMAC_TXMAX/BMAC_RXMAX
      and allocating extra space via skb_put for the VLAN header.
      Signed-off-by: NChris Poon <dev-null@telus.net>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a5a97263
    • R
      72e51065
    • R
      [MIPS] irq_cpu: use handle_percpu_irq handler to avoid dropping interrupts. · 30e748a5
      Ralf Baechle 提交于
      This matters to any sort of device that is wired to one of the CPU
      interrupt pins on an SMP system.  Typically the scenario is most easily
      triggered with the count/compare timer interrupt where the same interrupt
      number and thus irq_desc is used on each processor.
      
         CPU A			CPU B
      
         do_IRQ()
         generic_handle_irq()
         handle_level_irq()
         spin_lock(desc_lock)
         set IRQ_INPROGRESS
         spin_unlock(desc_lock)
      				do_IRQ()
      				generic_handle_irq()
      				handle_level_irq()
      				spin_lock(desc_lock)
      				IRQ_INPROGRESS set => bail out
         spin_lock(desc_lock)
         clear IRQ_INPROGRESS
         spin_unlock(desc_lock)
      
      In case of the cp0 compare interrupt this means the interrupt will be
      acked and not handled or re-armed on CPU b, so there won't be any timer
      interrupt until the count register wraps around.
      
      With kernels 2.6.20 ... 2.6.23 we usually were lucky that things were just
      working right on VSMP because the count registers are synchronized on
      bootup so it takes something that disables interrupts for a long time on
      one processor to trigger this one.
      
      For scenarios where an interrupt is multicasted or broadcasted over several
      CPUs the existing code was safe and the fix will break it.  There is no
      way to know in the interrupt controller code because it is abstracted from
      the platform code.  I think we do not have such a setup currently, so this
      should be ok.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      30e748a5