- 04 1月, 2014 1 次提交
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由 Rashika Kheria 提交于
This patch marks the function is_erased() as static in denali.c because it is not used outside this file. This patch elimiates the following warning in nand/denali.c: drivers/mtd/nand/denali.c:900:6: warning: no previous prototype for ‘is_erased’ [-Wmissing-prototypes] Signed-off-by: NRashika Kheria <rashika.kheria@gmail.com> Reviewed-by: NJosh Triplett <josh@joshtriplett.org> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 28 10月, 2013 2 次提交
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由 Huang Shijie 提交于
Add a helper to check if a nand chip is SLC or MLC. This helper makes the code more readable. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Brian Norris 提交于
It's only used in this file. Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 31 8月, 2013 1 次提交
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由 Akinobu Mita 提交于
Use NAND_CI_CELLTYPE_MSK to extract the cell type from nand_chip.cellinfo instead of hardcoded constant. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Cc: Artem Bityutskiy <dedekind1@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 15 11月, 2012 1 次提交
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由 Dinh Nguyen 提交于
The Denali controller can also be found in SoC devices attached to a simple bus. Move the PCI specific parts into denali_pci so that we can add a denali_dt that uses the same driver but for a device tree driver instead of a PCI based device. Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
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- 07 7月, 2012 1 次提交
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由 Josh Wu 提交于
There is an implemention of hardware ECC write page function which may return an error indication. For instance, using Atmel HW PMECC to write one page into a nand flash, the hardware engine will compute the BCH ecc code for this page. so we need read a the status register to theck whether the ecc code is generated. But we cannot assume the status register always can be ready, for example, incorrect hardware configuration or hardware issue, in such case we need write_page() to return a error code. Since the definition of 'write_page' function in struct nand_ecc_ctrl is 'void'. So this patch will: 1. add return 'int' value for 'write_page' function. 2. to be consitent, add return 'int' value for 'write_page_raw' fuctions too. 3. add code to test the return value, and if negative, indicate an error happend when write page with ECC. 4. fix the compile warning in all impacted nand flash driver. Note: I couldn't compile-test all of these easily, as some had ARCH dependencies. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 14 5月, 2012 4 次提交
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由 Shmulik Ladkani 提交于
As of [mtd: nand: remove autoincrement 'sndcmd' code], the NAND_CMD_READ0 command is issued unconditionally. Thus, read_oob/read_oob_raw's 'sndcmd' argument is no longer needed, as well as their return code. Remove the 'sndcmd' parameter, and set the return code to 0. Signed-off-by: NShmulik Ladkani <shmulik.ladkani@gmail.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Brian Norris 提交于
New NAND controllers can perform read/write via HW engines which don't expose OOB data in their DMA mode. To reflect this, we should rework the nand_chip / nand_ecc_ctrl interfaces that assume that drivers will always read/write OOB data in the nand_chip.oob_poi buffer. A better interface includes a boolean argument that explicitly tells the callee when OOB data is requested by the calling layer (for reading/writing to/from nand_chip.oob_poi). This patch adds the 'oob_required' parameter to each relevant {read,write}_page interface; all 'oob_required' parameters are left unused for now. The next patch will set the parameter properly in the nand_base.c callers, and follow-up patches will make use of 'oob_required' in some of the callee functions. Note that currently, there is no harm in ignoring the 'oob_required' parameter and *always* utilizing nand_chip.oob_poi, but there can be performance/complexity/design benefits from avoiding filling oob_poi in the common case. I will try to implement this for some drivers which can be ported easily. Note: I couldn't compile-test all of these easily, as some had ARCH dependencies. [dwmw2: Merge later 1/0 vs. true/false cleanup] Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Reviewed-by: NShmulik Ladkani <shmulik.ladkani@gmail.com> Acked-by: NJiandong Zheng <jdzheng@broadcom.com> Acked-by: NMike Dunn <mikedunn@newsguy.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Mike Dunn 提交于
The ecc.read_page() method for nand drivers is changed to return the maximum number of bitflips that were corrected on any one region covering an ecc step, This patch doesn't change what the nand code returns to mtd. This v2 includes the change to the fsl_ifc_nand driver requested by Scott¹. ¹ http://lists.infradead.org/pipermail/linux-mtd/2012-April/040883.htmlSigned-off-by: NMike Dunn <mikedunn@newsguy.com> Acked-by (freescale changes): Scott Wood <scottwood@freescale.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Axel Lin 提交于
This patch converts the drivers in drivers/mtd/* to use module_pci_driver() macro which makes the code smaller and a bit simpler. Signed-off-by: NAxel Lin <axel.lin@gmail.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 27 3月, 2012 1 次提交
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由 Mike Dunn 提交于
Flash device drivers initialize 'ecc_strength' in struct mtd_info, which is the maximum number of bit errors that can be corrected in one writesize region. Drivers using the nand interface intitialize 'strength' in struct nand_ecc_ctrl, which is the maximum number of bit errors that can be corrected in one ecc step. Nand infrastructure code translates this to 'ecc_strength'. Also for nand drivers, the nand infrastructure code sets ecc.strength for ecc modes NAND_ECC_SOFT, NAND_ECC_SOFT_BCH, and NAND_ECC_NONE. It is set in the driver for all other modes. Signed-off-by: NMike Dunn <mikedunn@newsguy.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 11 9月, 2011 4 次提交
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由 Jamie Iles 提交于
Commit c89eeda8 (mtd: denali: detect the number of banks) introduced runtime detection of the number of banks. However, denali_nand_reset() uses uses denanli_nand_info::max_banks so we need to detect the maximum number of banks before doing the reset. Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
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由 Axel Lin 提交于
The implementation of nand_release() already call mtd_device_unregister(), no need to call it again. Signed-off-by: NAxel Lin <axel.lin@gmail.com> Acked-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
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由 Brian Norris 提交于
Recall the recently added prefix requirements: * "NAND_" for flags in nand.h, used in nand_chip.options * "NAND_BBT_" for flags in bbm.h, used in nand_chip.bbt_options or in nand_bbt_descr.options Thus, I am changing NAND_USE_FLASH_BBT to NAND_BBT_USE_FLASH. Again, this flag is found in bbm.h and so should NOT be used in the "nand_chip.options" field. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
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由 Brian Norris 提交于
This patch works with the following three flags from two headers (nand.h and bbm.h): (1) NAND_USE_FLASH_BBT (nand.h) (2) NAND_USE_FLASH_BBT_NO_OOB (nand.h) (3) NAND_BBT_NO_OOB (bbm.h) These flags are all related and interdependent, yet they were in different headers. Flag (2) is simply the combination of (1) and (3) and can be eliminated. This patch accomplishes the following: * eliminate NAND_USE_FLASH_BBT_NO_OOB (i.e., flag (2)) * move NAND_USE_FLASH_BBT (i.e., flag (1)) to bbm.h It's important to note that because (1) and (3) are now both found in bbm.h, they should NOT be used in the "nand_chip.options" field. I removed a small section from the mtdnand DocBook because it referes to NAND_USE_FLASH_BBT in nand.h, which has been moved to bbm.h. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
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- 25 5月, 2011 5 次提交
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由 Jamie Iles 提交于
The older add_mtd_device()/add_mtd_partitions() and their removal counterparts will soon be gone. Replace uses with mtd_device_register() and mtd_device_unregister(). Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Jamie Iles 提交于
Not all configurations of the Denali controller support 4 banks. The controller can support between 1 and 16 banks. Detect this from the design features register. Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Jamie Iles 提交于
The controller has interrupt enable/status register pairs for each bank (along with ECC and status registers) that differ only in address offset. Rather than providing definitions for each register, make the address a macro so that it scales for devices with different numbers of banks. Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Jamie Iles 提交于
Rather than using the PCI specific DMA API, convert to the generic DMA API so that we can use the Denali NAND controller on other bus types. Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Michal Marek 提交于
The kernel already prints its build timestamp during boot, no need to repeat it in random drivers and produce different object files each time. Signed-off-by: NMichal Marek <mmarek@suse.cz> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 25 10月, 2010 1 次提交
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由 Florian Fainelli 提交于
Signed-off-by: NFlorian Fainelli <ffainelli@freebox.fr> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 12 8月, 2010 5 次提交
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由 Chuanxiao Dong 提交于
All hardware initialization will be done in denali_hw_init before irq handler registered Change mtd name from "DENALI NAND" to be "denali-nand" since whitespace in name can cause problems if we use cmdlinepart Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Chuanxiao Dong 提交于
Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Chuanxiao Dong 提交于
Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Chuanxiao Dong 提交于
In mtd->write, Denali controller will use MODE_11 mode to read NAND flash status, then return back to MODE_1O mode to do page write. Here comes a bug for this kind of using, sometimes controller will not write data to NAND and just return a good interrupt to tell driver writing work is done. The data in this page is all 0xff and this page can not be written again. The reason is unknow. So read Denali controller register WRITE_PROTECT to get NAND status instead. Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Chuanxiao Dong 提交于
waring: no space for starting a line Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 11 8月, 2010 4 次提交
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由 Chuanxiao Dong 提交于
Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Chuanxiao Dong 提交于
Once the last ECC error was handled, controller will triger an interrupt. If this interrupt can not be clean on time, controller may corrupt. Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Chuanxiao Dong 提交于
denali_write32() just implements a debug function for iowrite32(), only print out the write value. Remove this function since it's useless Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Chuanxiao Dong 提交于
Fixed a pci_resource_len function error; Changed returning sequence of probe function; Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 06 8月, 2010 7 次提交
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由 Chuanxiao Dong 提交于
Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Chuanxiao Dong 提交于
set_ecc_config function only set ECC_CORRECTION register, so move register setting to probe function. Since controller only support 15bit and 8bit ecc correction, updated nand ecc layout information. Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Chuanxiao Dong 提交于
Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Chuanxiao.Dong 提交于
Hi David, I sent 4 patches using my intel email account. If there is any problem about the format of these patches, I will resend them after I arrived at home by using my gmail account, and I will keep on using gmail account to send patches. Thanks. >From 242e3bf5e17f54b1df8cf285154a7c7a61ff62e9 Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong <chuanxiao.dong@intel.com> Date: Fri, 6 Aug 2010 15:29:41 +0800 Subject: [PATCH 1/4] mtd: denali: Remove device_info_tag structure. Most of the variables in this structure are useless, so just remove this structure and relevant codes. Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 David Miller 提交于
Signed-off-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Chuanxiao Dong 提交于
In denali driver, wTotalBlocks variable is useless, so just remove them in get_toshiba_nand_para and get_hynix_nand_para first. Other wTotalBlocks in denali.c and other variables in dev_info struct are also useless, will remove them later. Also add a parameter in get_hynix_nand_para to prepare to remove dev_info struct. This parameter comes by reading NAND ID directly. Reading register will report wrong value for some NAND chips, e.g. some Micron MT29F32G08QAA chips. So update NAND_CMD_READID method as well. Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Chuanxiao Dong 提交于
rename these functions' name and remove additional declarations in header file Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 05 8月, 2010 2 次提交
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由 Chuanxiao Dong 提交于
Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Chuanxiao Dong 提交于
Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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