1. 31 8月, 2011 1 次提交
  2. 26 8月, 2011 1 次提交
    • L
      ath9k_hw: add AR9580 support · 5a63ef0f
      Luis R. Rodriguez 提交于
      Here are the AR9580 1.0 initvals checksums using the
      Atheros initvals-tools [1]. This is useful for when
      we udate the initvals again with other values. It ensures
      that we match the same initvals used internally. The
      tool is documented on the wiki [2].
      
      $ ./initvals -f ar9580-1p0
      0x00000000e912711f        ar9580_1p0_modes_fast_clock
      0x000000004a488fc7        ar9580_1p0_radio_postamble
      0x00000000f3888b02        ar9580_1p0_baseband_core
      0x0000000003f783bb        ar9580_1p0_mac_postamble
      0x0000000094be244a        ar9580_1p0_low_ob_db_tx_gain_table
      0x0000000094be244a        ar9580_1p0_high_power_tx_gain_table
      0x0000000090be244a        ar9580_1p0_lowest_ob_db_tx_gain_table
      0x00000000ed9eaac6        ar9580_1p0_baseband_core_txfir_coeff_japan_2484
      0x00000000c4d66d1b        ar9580_1p0_mac_core
      0x00000000e8e9043a        ar9580_1p0_mixed_ob_db_tx_gain_table
      0x000000003521a300        ar9580_1p0_wo_xlna_rx_gain_table
      0x00000000301fc841        ar9580_1p0_soc_postamble
      0x00000000a9a06b3a        ar9580_1p0_high_ob_db_tx_gain_table
      0x00000000a15ccf1b        ar9580_1p0_soc_preamble
      0x0000000029495000        ar9580_1p0_rx_gain_table
      0x0000000037ac0ee8        ar9580_1p0_radio_core
      0x00000000603a1b80        ar9580_1p0_baseband_postamble
      0x000000003d8b4396        ar9580_1p0_pcie_phy_clkreq_enable_L1
      0x00000000398b4396        ar9580_1p0_pcie_phy_clkreq_disable_L1
      0x00000000397b4396        ar9580_1p0_pcie_phy_pll_on_clkreq
      
      [1] git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/initvals-tool.git
      [2] http://wireless.kernel.org/en/users/Drivers/ath9k_hw/initvals-tool
      
      Cc: David Quan <dquan@qca.qualcomm.com>
      Cc: Kathy Giori <kgiori@qca.qualcomm.com>
      Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com>
      Tested-by: NFlorian Fainelli <florian@openwrt.org>
      Signed-off-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      5a63ef0f
  3. 23 8月, 2011 2 次提交
  4. 10 8月, 2011 2 次提交
  5. 09 8月, 2011 2 次提交
  6. 02 8月, 2011 1 次提交
  7. 12 7月, 2011 1 次提交
  8. 08 7月, 2011 1 次提交
  9. 23 6月, 2011 3 次提交
  10. 21 6月, 2011 1 次提交
  11. 02 6月, 2011 2 次提交
  12. 27 5月, 2011 1 次提交
  13. 20 5月, 2011 1 次提交
  14. 17 5月, 2011 3 次提交
  15. 06 5月, 2011 1 次提交
  16. 29 4月, 2011 1 次提交
  17. 26 4月, 2011 5 次提交
  18. 20 4月, 2011 1 次提交
    • F
      ath9k: fix powersave frame filtering/buffering in AP mode · 5519541d
      Felix Fietkau 提交于
      This patch fixes a long standing issue of pending packets in the queue being
      sent (and retransmitted many times) to sleeping stations.
      This was made worse by aggregation through driver-internal retransmitting
      of A-MDPU subframes.
      Previously the hardware tx filter was cleared unconditionally for every
      single packet - with this patch it uses the IEEE80211_TX_CTL_CLEAR_PS_FILT
      for unaggregated frames.
      A sta_notify driver op is added to stop aggregation for stations when they
      enter powersave mode. Subframes stay buffered inside the driver, to ensure
      that the BlockAck window keeps a sane state.
      Since the driver uses software aggregation, the clearing of the tx filter
      needs to be handled by the driver instead of mac80211 for aggregated frames.
      Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      5519541d
  19. 15 4月, 2011 1 次提交
  20. 05 4月, 2011 2 次提交
  21. 31 3月, 2011 7 次提交