1. 15 8月, 2015 4 次提交
  2. 14 8月, 2015 5 次提交
  3. 05 8月, 2015 2 次提交
  4. 29 7月, 2015 2 次提交
  5. 14 7月, 2015 1 次提交
  6. 30 6月, 2015 2 次提交
  7. 24 6月, 2015 1 次提交
    • D
      drm/i915/drrs: Restrict buffer tracking to the DRRS pipe · c1d038c6
      Daniel Vetter 提交于
      The current code tracks business across all pipes, but we're only
      really interested in the one pipe DRRS is enabled on. Fairly tiny
      optimization, but something I noticed while reading the code. But it
      might matter a bit when e.g. showing a video or something only on the
      external screen, while the panel is kept static.
      
      Also regroup the code slightly: First compute new bitmasks, then take
      appropriate actions.
      
      Cc: Ramalingam C <ramalingam.c@intel.com>
      Cc: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
      Reviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      c1d038c6
  8. 22 6月, 2015 1 次提交
  9. 18 6月, 2015 1 次提交
    • V
      drm/i915/bxt: eDP Panel Power sequencing · b0a08bec
      Vandana Kannan 提交于
      Changes for BXT - added a IS_BROXTON check to use the macro related to PPS
      registers for BXT.
      BXT does not have PP_DIV register. Making changes to handle this.
      Second set of PPS registers have been defined but will be used when VBT
      provides a selection between the 2 sets of registers.
      
      v2:
      [Jani] Added 2nd set of PPS registers and the macro
      Jani's review comments
      	- remove reference in i915_suspend.c
      	- Use BXT PP macro
      Squashing all PPS related patches into one.
      
      v3: Jani's review comments addressed
      	- Use pp_ctl instead of pp
      	- ironlake_get_pp_control() is not required for BXT
      	- correct the use of && in the print statement
      	- drop the shift in the print statement
      
      v4: Jani's comments
      	- modify ironlake_get_pp_control() - dont set unlock key for bxt
      
      v5: Sonika's comments addressed
      	- check alignment
      	- move pp_ctrl_reg write (after ironlake_get_pp_control())
      	to !IS_BROXTON case.
      	- check before subtracting 1 for t11_t12
      Signed-off-by: NVandana Kannan <vandana.kannan@intel.com>
      Signed-off-by: NA.Sunil Kamath <sunil.kamath@intel.com>
      Reviewed-by: NSonika Jindal <sonika.jindal@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b0a08bec
  10. 15 6月, 2015 1 次提交
  11. 12 6月, 2015 1 次提交
  12. 03 6月, 2015 1 次提交
  13. 01 6月, 2015 1 次提交
  14. 29 5月, 2015 2 次提交
  15. 28 5月, 2015 2 次提交
  16. 22 5月, 2015 4 次提交
  17. 20 5月, 2015 4 次提交
  18. 08 5月, 2015 5 次提交
    • V
      drm/i915: Only wait for required lanes in vlv_wait_port_ready() · 9b6de0a1
      Ville Syrjälä 提交于
      Currently vlv_wait_port_ready() waits for all four lanes on the
      appropriate channel. This no longer works on CHV when the unused
      lanes may be power gated. So pass in a mask of lanes that the
      caller is expecting to be ready.
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by:  Deepak S<deepak.s@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      9b6de0a1
    • D
      drm/edid: Kerneldoc for newly added edid_corrupt · ac6f2e29
      Daniel Vetter 提交于
      Also treat it as a proper boolean.
      
      Cc: Todd Previte <tprevite@gmail.com>
      Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
      Cc: dri-devel@lists.freedesktop.org
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      ac6f2e29
    • V
      drm/i915: Implement chv display PHY lane stagger setup · 2e523e98
      Ville Syrjälä 提交于
      Set up the chv display PHY lane stagger registers according to
      "Programming Guide for 1273 CHV eDP/DP/HDMI Display PHY" v1.04
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NDeepak S <deepak.s@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      2e523e98
    • S
      drm/i915: Rename dp rates array as per platform · 637a9c63
      Sonika Jindal 提交于
      Renaming gen9_rates to skl_rates because other platforms may have different
      supported rates.
      Signed-off-by: NSonika Jindal <sonika.jindal@intel.com>
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      637a9c63
    • T
      drm/i915: Implement the intel_dp_autotest_edid function for DP EDID complaince tests · 559be30c
      Todd Previte 提交于
      Updates the EDID compliance test function to perform the analyze and react to
      the EDID data read as a result of a hot plug event. The results of this
      analysis are handed off to userspace so that the userspace app can set the
      display mode appropriately for the test result/response.
      
      The compliance_test_active flag now appears at the end of the individual
      test handling functions. This is so that the kernel-side operations can
      be completed without the risk of interruption from the userspace app
      that is polling on that flag.
      
      V2:
      - Addressed mailing list feedback
      - Removed excess debug messages
      - Removed extraneous comments
      - Fixed formatting issues (line length > 80)
      - Updated the debug message in compute_edid_checksum to output hex values
        instead of decimal
      V3:
      - Addressed more list feedback
      - Added the test_active flag to the autotest function
      - Removed test_active flag from handler
      - Added failsafe check on the compliance test active flag
        at the end of the test handler
      - Fixed checkpatch.pl issues
      V4:
      - Removed the checksum computation function and its use as it has been
        rendered superfluous by changes to the core DRM EDID functions
      - Updated to use the raw header corruption detection mechanism
      - Moved the declaration of the test_data variable here
      V5:
      - Update test active flag variable name to match the change in the
        first patch of the series.
      - Relocated the test active flag declaration and initialization
        to this patch
      V6:
      - Updated to use the new flag for raw EDID header corruption
      - Removed the extra EDID read from the autotest function
      - Added the edid_checksum variable to struct intel_dp so that the
        autotest function can write it to the sink device
      - Moved the update to the hpd_pulse function to another patch
      - Removed extraneous constants
      V7:
      - Fixed erroneous placement of the checksum assignment. In some cases
        such as when the EDID read fails and is NULL, this causes a NULL ptr
        dereference in the kernel. Bad news. Fixed now.
      V8:
      - Updated to support the kfree() on the EDID data added previously
      V9:
      - Updated for the long_hpd flag propagation
      V10:
      - Updated to use actual checksum from the EDID read that occurs during
        normal hot plug path execution
      - Removed variables from intel_dp struct that are no longer needed
      - Updated the patch subject to more closely match the nature and contents
        of the patch
      - Fixed formatting problem (long line)
      V11:
      - Removed extra debug messages
      - Updated comments to be more informative
      - Removed extra variable
      V12:
      - Removed the 4 bit offset of the resolution setting in compliance data
      - Changed to DRM_DEBUG_KMS instead of DRM_DEBUG_DRIVER
      Signed-off-by: NTodd Previte <tprevite@gmail.com>
      Reviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      559be30c