- 28 11月, 2016 1 次提交
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由 Bartosz Golaszewski 提交于
Currently the memory controller and master priorities drivers are enabled in da850.dtsi. For boards for which there are no settings defined, this makes these drivers emit error messages. Disable the nodes in da850.dtsi and only enable them for da850-lcdk - the only board that currently needs them. Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 20 11月, 2016 1 次提交
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由 Alexandre Bailon 提交于
This adds the device tree node for the usb otg controller present in the da850 family of SoC's. Signed-off-by: NAlexandre Bailon <abailon@baylibre.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 15 11月, 2016 1 次提交
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由 Bartosz Golaszewski 提交于
Add the nodes for the MSTPRI configuration and DDR2/mDDR memory controller drivers to da850.dtsi. Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 01 11月, 2016 1 次提交
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由 David Lechner 提交于
Add a syscon node for the SoC CFGCHIPn registers. It includes a child node for the USB PHY that is part of this range of registers. Signed-off-by: NDavid Lechner <david@lechnology.com> [nsekhar@ti.com: drop OF_DEV_AUXDATA() addition] Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 31 10月, 2016 2 次提交
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由 David Lechner 提交于
Add the bindings for DMA on SPI0 Signed-off-by: NDavid Lechner <david@lechnology.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Karl Beldan 提交于
Add pins used by the LCD controller and a disabled LCDC node to be reused in device trees including da850.dtsi. Signed-off-by: NKarl Beldan <kbeldan@baylibre.com> [Bartosz: - added the commit description - changed the dt node name to a generic one - added a da850-specific compatible string - removed the tilcdc,panel node - moved the pins definitions to da850.dtsi as suggested by Sekhar Nori (was in: da850-lcdk.dts)] Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> [nsekhar@ti.com: fix compatible property and remove interrupt-parent] Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 18 8月, 2016 1 次提交
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由 Karl Beldan 提交于
Currently the davinci da8xx boards use the mach-davinci aemif code. Instantiating an aemif node into the DT allows to use the ti-aemif memory driver and is another step to better DT support. This change adds an aemif node in the dtsi while retiring the nand_cs3 node. The NAND is now instantiated in the dts as a subnode of the aemif one along with its pins. Signed-off-by: NKarl Beldan <kbeldan@baylibre.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 09 8月, 2016 2 次提交
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由 Karl Beldan 提交于
This adds 2 pinctrl groups (rtscts, rxtx) for each of the 3 UARTs. Signed-off-by: NKarl Beldan <kbeldan@baylibre.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Cooper Jr., Franklin 提交于
For some devices, the PWMSS is a parent of eCAP and ePWM and provides the functional clocks for those submodules. The ti,am33xx-ecap and ti,am33xx-ehrpwm bindings were based on this parent child relationship where the functional clock would be grabbed from the module's parent. However, DA850 doesn't have a PWMSS and the eCAP and ePWM provides their functional clock themselves. Therefore, prefer the new binding that doesn't assume this parent child relationship. Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com> Acked-by: NRob Herring <robh@kernel.org> [nsekhar@ti.com: minor commit message fixes] Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 25 4月, 2016 3 次提交
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由 David Lechner 提交于
Fix off by one error in da850 device tree in the number of INTC interrupts. Signed-off-by: NDavid Lechner <david@lechnology.com> Tested-by: NKevin Hilman <khilman@baylibre.com> [nsekhar@ti.com: commit message update] Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 David Lechner 提交于
Disable mdio and eth0 in da850.dtsi file. All other devices are disabled by default and not all boards will use these devices, so these should be disabled too. da850-evm.dtb already had status = "okay" for these devices. da850-enbw-cmc.dts did not, so they were added. Signed-off-by: NDavid Lechner <david@lechnology.com> Tested-by: NKevin Hilman <khilman@baylibre.com> [nsekhar@ti.com: commit description updates] Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 David Lechner 提交于
Add device node and pinmux for SoC spi0. Signed-off-by: NDavid Lechner <david@lechnology.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 14 4月, 2016 3 次提交
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由 Petr Kulhavy 提交于
da850 has two I2C controllers, but the node for i2c1 was missing. Add node for i2c1 controller and i2c1 pinmux pins. Signed-off-by: NPetr Kulhavy <petr@barix.com> [nsekhar@ti.com: fix indentation] Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 David Lechner 提交于
TI has been using the physical address in DT after the @ in device nodes. The device tree convention is to use the same address that is used for the reg property. This updates all davinci DT files to use the proper convention. Signed-off-by: NDavid Lechner <david@lechnology.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Petr Kulhavy 提交于
The gpio node is missing the mandatory property #gpio-cells, which is causing runtime errors when using GPIOs e.g. with gpio-leds or gpio-keys: "could not get #gpio-cells for /soc/gpio@1e26000" This fixes the problem and adds the missing parameter. The value is 2 according to the gpio-davinci.txt binding. Signed-off-by: NPetr Kulhavy <petr@barix.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 13 4月, 2016 1 次提交
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由 Franklin S Cooper Jr 提交于
When possible generic node names should be used. So change the node name from ehrpwm to pwm. Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 24 12月, 2015 6 次提交
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由 Peter Ujfalusi 提交于
Add the needed bindings so the SPI driver can use DMA with SPI1. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: NSushaanth Srirangapathi <sushaanth.s@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Peter Ujfalusi 提交于
da850 has two MMC controller, MMCSD1 is served by eDMA1 Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: NSushaanth Srirangapathi <sushaanth.s@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Peter Ujfalusi 提交于
Add the needed bindings for MMC0 in order to be able to utilize the DMA instead of PIO mode. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: NSushaanth Srirangapathi <sushaanth.s@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Peter Ujfalusi 提交于
The eDMA1 in da850 has only one TPTC and for example MMC1 is HW events are handled by it. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: NSushaanth Srirangapathi <sushaanth.s@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Peter Ujfalusi 提交于
Switch to use the ti,edma3-tpcc and ti,edma3-tptc binding for the eDMA3. With the new bindings boards can customize and tweak the DMA channel priority to match their needs. With the new binding the memcpy is safe to be used since with the old binding it was not possible for a driver to know which channel is allowed to be used as non HW triggered channel. Using the new binding will allow us to reserve PaRAM slots to be used by the DSP which was not possible before and prevented the da850 boards to be moved to DT only. Note that the DMA memcpy is disabled, it can be enabled by reserving channels for memcpy by adding the following property to the edma node: ti,edma-memcpy-channels = <20 21>; /* Reserving channel 20 and 21 for memcpy */ Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: NSushaanth Srirangapathi <sushaanth.s@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Peter Ujfalusi 提交于
The size of the eDMA0 CC register space is 0x8000 and not 0x10000. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: NSushaanth Srirangapathi <sushaanth.s@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 26 8月, 2014 2 次提交
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由 Peter Ujfalusi 提交于
Node for mcasp0 Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Peter Ujfalusi 提交于
Add DT node for edma0. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 15 12月, 2013 1 次提交
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由 KV Sujith 提交于
Add DT node for Davinci GPIO driver. Signed-off-by: NKV Sujith <sujithkv@ti.com> Signed-off-by: NPhilip Avinash <avinashphilip@ti.com> Signed-off-by: NLad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 22 8月, 2013 3 次提交
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由 Manjunathappa, Prakash 提交于
DT kernel on da850-evm comes up with garbled UART logs. This is because of mismatch in actual module clock rate and rate specified(clock-frequency) in DT blob. kernel should not assume or depend on bootloaders clock configuration, instead let it find the clock rate at runtime. Issue discussed here before arriving on this implementation: "ARM: davinci: da850 evm: update clock rate for UART 1/2 DT nodes" https://patchwork.kernel.org/patch/2162271/Signed-off-by: NManjunathappa, Prakash <prakash.pm@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Lad, Prabhakar 提交于
Add ethernet device tree node information and pinmux for mii to da850 by providing interrupt details and local mac address. Signed-off-by: NLad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Lad, Prabhakar 提交于
Add mdio device tree node information to da850 by providing register details and bus frequency of mdio. Signed-off-by: NLad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 27 6月, 2013 1 次提交
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由 Manjunathappa, Prakash 提交于
function-mask DT property is now a mask for a pin at each pin offset inside a given pincontrol register. Fix DA850 DT data to reflect this change. Signed-off-by: NManjunathappa, Prakash <prakash.pm@ti.com> [nsekhar@ti.com: reword commit message for clarity] Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 20 6月, 2013 1 次提交
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由 Philip Avinash 提交于
Replace /include/ by #include for da850 device tree files, in order to use the C pre-processor, making use of #define features possible. Signed-off-by: NPhilip Avinash <avinashphilip@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 18 4月, 2013 1 次提交
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由 Manjunathappa, Prakash 提交于
Patch adds SPI1 DT node along with pinmux data. Signed-off-by: NManjunathappa, Prakash <prakash.pm@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 15 4月, 2013 1 次提交
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由 Philip Avinash 提交于
Add da850 EHRPWM & ECAP DT node along with pin-mux details. Also adds OF_DEV_AUXDATA for EHRPWM & ECAP driver to use EHRPWM & ECAP clock. Signed-off-by: NPhilip Avinash <avinashphilip@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 04 4月, 2013 1 次提交
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由 Manjunathappa, Prakash 提交于
Add DT entry for MMC. Also add entry for pinmux information. Tested: 1) Without GPIO card detection and EDMA support as DT support for GPIO and EDMA are yet come. 2) By creating/deleting files and mounting/unmounting the partition. Signed-off-by: NManjunathappa, Prakash <prakash.pm@ti.com> Cc: linux-mmc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: davinci-linux-open-source@linux.davincidsp.com Cc: devicetree-discuss@lists.ozlabs.org Cc: cjb@laptop.org Cc: Sekhar Nori <nsekhar@ti.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 10 2月, 2013 2 次提交
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由 Kumar, Anil 提交于
Add da850 wdt DT node. Add OF_DEV_AUXDATA for wdt driver to use wdt clock. Signed-off-by: NKumar, Anil <anilkumar.v@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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Add I2C0 device tree and pin muxing information to da850-evm. Also, add OF_DEV_AUXDATA for I2C0 controller driver in da850 board dt file to use I2C0 clock. Verified i2c0 node gets created in sys class interface as "/sys/class/i2c-dev/i2c-0/subsystem/i2c-0". nsekhar@ti.com: tested using i2cdetect and i2cdump. Signed-off-by: NVishwanathrao Badarkhe, Manish <manishv.b@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 28 1月, 2013 2 次提交
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由 Mrugesh Katepallewar 提交于
Add RTC DT entries in da850 dts file. Tested on da850-evm device. Test Procedure: $ date 2013.01.28-10:00:00 # usage: date[YYYY.]MM.DD-hh:mm[:ss] $ hwclock -w (reset board and check system time) Signed-off-by: NMrugesh Katepallewar <mrugesh.mk@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Lad, Prabhakar 提交于
This patch moves 'interrupt-parent' property to soc node, so that the child inherits this property. This avoids adding 'interrupt-parent' property to each node. Signed-off-by: NLad, Prabhakar <prabhakar.lad@ti.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: davinci-linux-open-source@linux.davincidsp.com Cc: devicetree-discuss@lists.ozlabs.org Cc: Sekhar Nori <nsekhar@ti.com> Cc: Heiko Schocher <hs@denx.de> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 21 1月, 2013 2 次提交
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由 Kumar, Anil 提交于
Add NAND driver DT node and related pinctrl DT data to export NAND functionality on da850 evm. Signed-off-by: NKumar, Anil <anilkumar.v@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Kumar, Anil 提交于
For DT, DaVinci platform can use pinctrl-single driver for handling padconf registers. Enable PINCTRL Kconfig for MACH_DA8XX_DT platform. Add required pinctrl DT entries in da850 dts file. Test procedure 1)Populate DT file with NAND node information. 2)Populate board DT file with pinmux information for NAND. 3)Boot and confirm NAND is detected by the kernel. 4)cat /proc/mtd to show partitions. Signed-off-by: NKumar, Anil <anilkumar.v@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 29 10月, 2012 1 次提交
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由 Heiko Schocher 提交于
Add DT data for DA850 SoC. Only interrupt controller and serial port information is being added at this time. Signed-off-by: NHeiko Schocher <hs@denx.de> [nsekhar@ti.com: refactored DT data into SoC specific and board specific and include SoC data into .dtsi file] Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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