1. 20 12月, 2013 2 次提交
    • K
      stackprotector: Introduce CONFIG_CC_STACKPROTECTOR_STRONG · 8779657d
      Kees Cook 提交于
      This changes the stack protector config option into a choice of
      "None", "Regular", and "Strong":
      
         CONFIG_CC_STACKPROTECTOR_NONE
         CONFIG_CC_STACKPROTECTOR_REGULAR
         CONFIG_CC_STACKPROTECTOR_STRONG
      
      "Regular" means the old CONFIG_CC_STACKPROTECTOR=y option.
      
      "Strong" is a new mode introduced by this patch. With "Strong" the
      kernel is built with -fstack-protector-strong (available in
      gcc 4.9 and later). This option increases the coverage of the stack
      protector without the heavy performance hit of -fstack-protector-all.
      
      For reference, the stack protector options available in gcc are:
      
      -fstack-protector-all:
        Adds the stack-canary saving prefix and stack-canary checking
        suffix to _all_ function entry and exit. Results in substantial
        use of stack space for saving the canary for deep stack users
        (e.g. historically xfs), and measurable (though shockingly still
        low) performance hit due to all the saving/checking. Really not
        suitable for sane systems, and was entirely removed as an option
        from the kernel many years ago.
      
      -fstack-protector:
        Adds the canary save/check to functions that define an 8
        (--param=ssp-buffer-size=N, N=8 by default) or more byte local
        char array. Traditionally, stack overflows happened with
        string-based manipulations, so this was a way to find those
        functions. Very few total functions actually get the canary; no
        measurable performance or size overhead.
      
      -fstack-protector-strong
        Adds the canary for a wider set of functions, since it's not
        just those with strings that have ultimately been vulnerable to
        stack-busting. With this superset, more functions end up with a
        canary, but it still remains small compared to all functions
        with only a small change in performance. Based on the original
        design document, a function gets the canary when it contains any
        of:
      
          - local variable's address used as part of the right hand side
            of an assignment or function argument
          - local variable is an array (or union containing an array),
            regardless of array type or length
          - uses register local variables
      
        https://docs.google.com/a/google.com/document/d/1xXBH6rRZue4f296vGt9YQcuLVQHeE516stHwt8M9xyU
      
      Find below a comparison of "size" and "objdump" output when built with
      gcc-4.9 in three configurations:
      
        - defconfig
      	11430641 kernel text size
      	36110 function bodies
      
        - defconfig + CONFIG_CC_STACKPROTECTOR_REGULAR
      	11468490 kernel text size (+0.33%)
      	1015 of 36110 functions are stack-protected (2.81%)
      
        - defconfig + CONFIG_CC_STACKPROTECTOR_STRONG via this patch
      	11692790 kernel text size (+2.24%)
      	7401 of 36110 functions are stack-protected (20.5%)
      
      With -strong, ARM's compressed boot code now triggers stack
      protection, so a static guard was added. Since this is only used
      during decompression and was never used before, the exposure
      here is very small. Once it switches to the full kernel, the
      stack guard is back to normal.
      
      Chrome OS has been using -fstack-protector-strong for its kernel
      builds for the last 8 months with no problems.
      Signed-off-by: NKees Cook <keescook@chromium.org>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Michal Marek <mmarek@suse.cz>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Stephen Rothwell <sfr@canb.auug.org.au>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linux-mips@linux-mips.org
      Cc: linux-arch@vger.kernel.org
      Link: http://lkml.kernel.org/r/1387481759-14535-3-git-send-email-keescook@chromium.org
      [ Improved the changelog and descriptions some more. ]
      Signed-off-by: NIngo Molnar <mingo@kernel.org>
      8779657d
    • K
      stackprotector: Unify the HAVE_CC_STACKPROTECTOR logic between architectures · 19952a92
      Kees Cook 提交于
      Instead of duplicating the CC_STACKPROTECTOR Kconfig and
      Makefile logic in each architecture, switch to using
      HAVE_CC_STACKPROTECTOR and keep everything in one place. This
      retains the x86-specific bug verification scripts.
      Signed-off-by: NKees Cook <keescook@chromium.org>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Michal Marek <mmarek@suse.cz>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Stephen Rothwell <sfr@canb.auug.org.au>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linux-mips@linux-mips.org
      Cc: linux-arch@vger.kernel.org
      Link: http://lkml.kernel.org/r/1387481759-14535-2-git-send-email-keescook@chromium.orgSigned-off-by: NIngo Molnar <mingo@kernel.org>
      19952a92
  2. 14 12月, 2013 1 次提交
    • R
      ARM: fix asm/memory.h build error · b713aa0b
      Russell King 提交于
      Jason Gunthorpe reports a build failure when ARM_PATCH_PHYS_VIRT is
      not defined:
      
      In file included from arch/arm/include/asm/page.h:163:0,
                       from include/linux/mm_types.h:16,
                       from include/linux/sched.h:24,
                       from arch/arm/kernel/asm-offsets.c:13:
      arch/arm/include/asm/memory.h: In function '__virt_to_phys':
      arch/arm/include/asm/memory.h:244:40: error: 'PHYS_OFFSET' undeclared (first use in this function)
      arch/arm/include/asm/memory.h:244:40: note: each undeclared identifier is reported only once for each function it appears in
      arch/arm/include/asm/memory.h: In function '__phys_to_virt':
      arch/arm/include/asm/memory.h:249:13: error: 'PHYS_OFFSET' undeclared (first use in this function)
      
      Fixes: ca5a45c0 ("ARM: mm: use phys_addr_t appropriately in p2v and v2p conversions")
      Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      b713aa0b
  3. 12 12月, 2013 5 次提交
  4. 11 12月, 2013 1 次提交
  5. 10 12月, 2013 9 次提交
  6. 09 12月, 2013 1 次提交
  7. 07 12月, 2013 4 次提交
    • T
      ARM: dts: Fix booting for secure omaps · f2e2c9d9
      Tony Lindgren 提交于
      Commit 7ce93f31 (ARM: OMAP2+: Fix more missing data for omap3.dtsi file)
      fixed missing device tree data for omaps, but did not account for some of the
      hardware modules being inaccessible for secure omaps. This causes the
      following error on secure omaps:
      
      Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa0c5048
      SMP ARM
      Modules linked in:
      CPU: 0 PID: 1 Comm: swapper/0 Tainted: G        W    3.13.0-rc2+ #446
      task: ce057b40 ti: ce058000 task.ti: ce058000
      PC is at omap_aes_dma_stop+0x24/0x3c
      LR is at omap_aes_probe+0x1cc/0x584
         psr: 60000113
      sp : ce059e20  ip : ce0b4ee0  fp : 00000000
      r10: c0573ae8  r9 : c0749508  r8 : 00000000
      r7 : ce0b4e00  r6 : 00000000  r5 : ce0b4e10  r4 : ce274890
      r3 : fa0c5048  r2 : 00000048  r1 : 0000002c  r0 : ce274890
      Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
      Control: 10c5387d  Table: 80004019  DAC: 00000015
      Process swapper/0 (pid: 1, stack limit = 0xce058248)
      Stack: (0xce059e20 to 0xce05a000)
      9e20: c0749508 0000a1ff 00000000 c016cd8c c06b5a06 ce2a45f0 ce2a4570 ce0b5fb0
      9e40: 00000000 480c5000 480c504f c0abe4e4 00000200 00000000 00000000 00000000
      9e60: ce0b4e10 ce0b4e10 c082da3c c082da3c c02b8c70 c077c610 c0749508 00000000
      9e80: 00000000 c02b9e7c c02b9e64 ce0b4e10 00000000 c02b8b20 ce0b4e10 ce0b4e44
      9ea0: c082da3c c02b8cd8 00000000 ce059eb8 c082da3c c02b7408 ce079edc ce0b1a34
      9ec0: c082da3c c082da3c ce2a0280 00000000 c08158d8 c02b8358 c0663405 c0663405
      9ee0: 00000073 c082da3c c079e4e8 c07ab3bc c0844340 c02b9334 00000000 00000006
      9f00: c079e4e8 c0008920 c067f6bf c0ac7c6b 00000000 c0712e28 00000000 00000000
      9f20: c0712e38 ce059f38 00000093 c0ac7c82 00000000 c0058994 00000000 c07130e8
      9f40: c07127b8 00000093 00000006 00000006 00000001 00000006 00000006 c079e4e8
      9f60: c07ab3bc c0844340 00000093 c0749508 c079e4f4 c0749c64 00000006 00000006
      9f80: c0749508 00000000 00000000 c0517e2c 00000000 00000000 00000000 00000000
      9fa0: 00000000 c0517e34 00000000 c000dfb8 00000000 00000000 00000000 00000000
      9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 ffffffff ffffffff
      (omap_aes_probe+0x1cc/0x584)
      (platform_drv_probe+0x18/0x48)
      (driver_probe_device+0xb0/0x200)
      (__driver_attach+0x68/0x8c)
      (bus_for_each_dev+0x50/0x88)
      (bus_add_driver+0xcc/0x1c8)
      (driver_register+0x9c/0xe0)
      (do_one_initcall+0x98/0x140)
      (kernel_init_freeable+0x16c/0x23c)
      (kernel_init+0x8/0x100)
      (ret_from_fork+0x14/0x3c)
      Code: e1811002 e5932020 e590300c e0833002 (e593c000)
      
      Let's fix the issue by adding omap34xx-hs.dtsi and omap36xx-hs.dtsi and make
      n900, n9 and n950 to use them. This way we have the aes, sham and timer12
      disabled for secure devices the same way legacy booting does based on the
      omap34xx_gp_hwmod_ocp_ifs and omap36xx_gp_hwmod_ocp_ifs arrays in
      omap_hwmod_3xxx_data.c.
      Reported-by: NSebastian Reichel <sre@debian.org>
      Acked-By: NSebastian Reichel <sre@debian.org>
      Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      f2e2c9d9
    • N
      ARM: OMAP2+: Fix the machine entry for am3517 · caef4ee8
      Nishanth Menon 提交于
      The am3517 is wrongly booting as omap3 which means that the am3517
      specific devices like Ethernet won't work when booted with device
      tree. Now with the new devices defined in am3517.dtsi, let's use
      that instead of the omap3.dtsi, and add a separate machine entry
      for am3517 so am3517-evm can use it.
      Signed-off-by: NNishanth Menon <nm@ti.com>
      [tony@atomide.com: updated comments and fixed build without omap3]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      caef4ee8
    • T
      ARM: dts: Fix missing entries for am3517 · a0158185
      Tony Lindgren 提交于
      On am3517 there are some extra devices compared to omap3.dtsi that
      we currently have not defined. Let's fix that by adding am3517.dtsi
      file.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      a0158185
    • T
      ARM: OMAP2+: Fix overwriting hwmod data with data from device tree · 5e863c56
      Tony Lindgren 提交于
      We have some device tree properties where the ti,hwmod have multiple
      values:
      
      am33xx.dtsi:	ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
      am4372.dtsi:	ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
      dra7.dtsi:	ti,hwmods = "l3_main_1", "l3_main_2";
      omap3.dtsi:	ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
      omap3.dtsi:	ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
      omap4.dtsi:	ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
      omap5.dtsi:	ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
      
      That's not correct way of doing things in this case because these are
      separate devices with their own address space, interrupts, SYSCONFIG
      registers and can set their PM states independently.
      
      So they should all be fixed up to be separate devices in the .dts files.
      
      We also have the related data removed for at least omap4 in commit
      3b9b1015 (ARM: OMAP4: hwmod data: Clean up the data file), so
      that data is wrongly initialized as null data.
      
      So we need to fix two bugs:
      
      1. We are only checking the first entry of the ti,hwmods property
      
         This means that we're only initializing the first hwmods entry
         instead of the ones listed in the ti,hwmods property.
      
      2. We are only checking the child nodes, not the nodes themselves
      
         This means that anything listed at OCP level is currently just
         ignored and unitialized and at least the omap4 case, with the
         legacy data missing from the hwmod.
      
      Fix both of the issues by using an index to the ti,hwmods property
      and changing the hwmod lookup function to also check the current node
      for ti,hwmods property instead of just the children.
      
      While at it, let's also add some warnings for the bad data so it's
      easier to fix.
      
      Cc: "Benoît Cousson" <bcousson@baylibre.com>
      Acked-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      5e863c56
  8. 05 12月, 2013 2 次提交
  9. 04 12月, 2013 5 次提交
  10. 03 12月, 2013 5 次提交
  11. 02 12月, 2013 3 次提交
  12. 01 12月, 2013 2 次提交
    • F
      ARM: 7907/1: lib: delay-loop: Add align directive to fix BogoMIPS calculation · 11d4bb1b
      Fabio Estevam 提交于
      Currently mx53 (CortexA8) running at 1GHz reports:
      Calibrating delay loop... 663.55 BogoMIPS (lpj=3317760)
      
      Tom Evans verified that alignments of 0x0 and 0x8 run the two instructions of __loop_delay in one clock cycle (1 clock/loop), while alignments of 0x4 and 0xc take 3 clocks to run the loop twice. (1.5 clock/loop)
      
      The original object code looks like this:
      
      00000010 <__loop_const_udelay>:
        10:	e3e01000 	mvn	r1, #0
        14:	e51f201c 	ldr	r2, [pc, #-28]	; 0 <__loop_udelay-0x8>
        18:	e5922000 	ldr	r2, [r2]
        1c:	e0800921 	add	r0, r0, r1, lsr #18
        20:	e1a00720 	lsr	r0, r0, #14
        24:	e0822b21 	add	r2, r2, r1, lsr #22
        28:	e1a02522 	lsr	r2, r2, #10
        2c:	e0000092 	mul	r0, r2, r0
        30:	e0800d21 	add	r0, r0, r1, lsr #26
        34:	e1b00320 	lsrs	r0, r0, #6
        38:	01a0f00e 	moveq	pc, lr
      
      0000003c <__loop_delay>:
        3c:	e2500001 	subs	r0, r0, #1
        40:	8afffffe 	bhi	3c <__loop_delay>
        44:	e1a0f00e 	mov	pc, lr
      
      After adding the 'align 3' directive to __loop_delay (align to 8 bytes):
      
      00000010 <__loop_const_udelay>:
        10:	e3e01000 	mvn	r1, #0
        14:	e51f201c 	ldr	r2, [pc, #-28]	; 0 <__loop_udelay-0x8>
        18:	e5922000 	ldr	r2, [r2]
        1c:	e0800921 	add	r0, r0, r1, lsr #18
        20:	e1a00720 	lsr	r0, r0, #14
        24:	e0822b21 	add	r2, r2, r1, lsr #22
        28:	e1a02522 	lsr	r2, r2, #10
        2c:	e0000092 	mul	r0, r2, r0
        30:	e0800d21 	add	r0, r0, r1, lsr #26
        34:	e1b00320 	lsrs	r0, r0, #6
        38:	01a0f00e 	moveq	pc, lr
        3c:	e320f000 	nop	{0}
      
      00000040 <__loop_delay>:
        40:	e2500001 	subs	r0, r0, #1
        44:	8afffffe 	bhi	40 <__loop_delay>
        48:	e1a0f00e 	mov	pc, lr
        4c:	e320f000 	nop	{0}
      
      , which now reports:
      Calibrating delay loop... 996.14 BogoMIPS (lpj=4980736)
      
      Some more test results:
      
      On mx31 (ARM1136) running at 532 MHz, before the patch:
      Calibrating delay loop... 351.43 BogoMIPS (lpj=1757184)
      
      On mx31 (ARM1136) running at 532 MHz after the patch:
      Calibrating delay loop... 528.79 BogoMIPS (lpj=2643968)
      
      Also tested on mx6 (CortexA9) and on mx27 (ARM926), which shows the same
      BogoMIPS value before and after this patch.
      Reported-by: NTom Evans <tom_usenet@optusnet.com.au>
      Suggested-by: NTom Evans <tom_usenet@optusnet.com.au>
      Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      11d4bb1b
    • D
      ARM: 7897/1: kexec: Use the right ISA for relocate_new_kernel · e2ccba49
      Dave Martin 提交于
      Copying a function with memcpy() and then trying to execute the
      result isn't trivially portable to Thumb.
      
      This patch modifies the kexec soft restart code to copy its
      assembler trampoline relocate_new_kernel() using fncpy() instead,
      so that relocate_new_kernel can be in the same ISA as the rest of
      the kernel without problems.
      Signed-off-by: NDave Martin <Dave.Martin@arm.com>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Reported-by: NTaras Kondratiuk <taras.kondratiuk@linaro.org>
      Tested-by: NTaras Kondratiuk <taras.kondratiuk@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      e2ccba49