1. 20 1月, 2012 1 次提交
  2. 21 7月, 2011 1 次提交
  3. 07 7月, 2011 1 次提交
  4. 11 5月, 2011 1 次提交
  5. 04 2月, 2011 2 次提交
    • R
      ARM: mmci: add dmaengine-based DMA support · c8ebae37
      Russell King 提交于
      Based on a patch from Linus Walleij.
      
      Add dmaengine based support for DMA to the MMCI driver, using the
      Primecell DMA engine interface.  The changes over Linus' driver are:
      
      - rename txsize_threshold to dmasize_threshold, as this reflects the
        purpose more.
      - use 'mmci_dma_' as the function prefix rather than 'dma_mmci_'.
      - clean up requesting of dma channels.
      - don't release a single channel twice when it's shared between tx and rx.
      - get rid of 'dma_enable' bool - instead check whether the channel is NULL.
      - detect incomplete DMA at the end of a transfer.  Some DMA controllers
        (eg, PL08x) are unable to be configured for scatter DMA and also listen
        to all four DMA request signals [BREQ,SREQ,LBREQ,LSREQ] from the MMCI.
        They can do one or other but not both.  As MMCI uses LBREQ/LSREQ for the
        final burst/words, PL08x does not transfer the last few words.
      - map and unmap DMA buffers using the DMA engine struct device, not the
        MMCI struct device - the DMA engine is doing the DMA transfer, not us.
      - avoid double-unmapping of the DMA buffers on MMCI data errors.
      - don't check for negative values from the dmaengine tx submission
        function - Dan says this must never fail.
      - use new dmaengine helper functions rather than using the ugly function
        pointers directly.
      - allow DMA code to be fully optimized away using dma_inprogress() which
        is defined to constant 0 if DMA engine support is disabled.
      - request maximum segment size from the DMA engine struct device and
        set this appropriately.
      - removed checking of buffer alignment - the DMA engine should deal with
        its own restrictions on buffer alignment, not the individual DMA engine
        users.
      - removed setting DMAREQCTL - this confuses some DMA controllers as it
        causes LBREQ to be asserted for the last seven transfers, rather than
        six SREQ and one LSREQ.
      - removed burst setting - the DMA controller should not burst past the
        transfer size required to complete the DMA operation.
      Tested-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      c8ebae37
    • R
      ARM: mmci: no need for separate host->data_xfered · 51d4375d
      Russell King 提交于
      We don't need to store the number of bytes transferred in our host
      structure - we can store this directly in data->bytes_xfered.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      51d4375d
  6. 24 1月, 2011 1 次提交
  7. 10 11月, 2010 2 次提交
  8. 12 10月, 2010 1 次提交
  9. 23 9月, 2010 1 次提交
  10. 27 8月, 2010 1 次提交
  11. 29 7月, 2010 2 次提交
  12. 27 7月, 2010 1 次提交
  13. 14 4月, 2010 1 次提交
  14. 23 9月, 2009 2 次提交
  15. 09 7月, 2009 1 次提交
  16. 03 2月, 2009 1 次提交
  17. 24 10月, 2007 1 次提交
  18. 26 7月, 2007 1 次提交
  19. 01 5月, 2007 1 次提交
  20. 05 1月, 2006 1 次提交
  21. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4