You need to sign in or sign up before continuing.
  • R
    ARM: mmci: add dmaengine-based DMA support · c8ebae37
    Russell King 提交于
    Based on a patch from Linus Walleij.
    
    Add dmaengine based support for DMA to the MMCI driver, using the
    Primecell DMA engine interface.  The changes over Linus' driver are:
    
    - rename txsize_threshold to dmasize_threshold, as this reflects the
      purpose more.
    - use 'mmci_dma_' as the function prefix rather than 'dma_mmci_'.
    - clean up requesting of dma channels.
    - don't release a single channel twice when it's shared between tx and rx.
    - get rid of 'dma_enable' bool - instead check whether the channel is NULL.
    - detect incomplete DMA at the end of a transfer.  Some DMA controllers
      (eg, PL08x) are unable to be configured for scatter DMA and also listen
      to all four DMA request signals [BREQ,SREQ,LBREQ,LSREQ] from the MMCI.
      They can do one or other but not both.  As MMCI uses LBREQ/LSREQ for the
      final burst/words, PL08x does not transfer the last few words.
    - map and unmap DMA buffers using the DMA engine struct device, not the
      MMCI struct device - the DMA engine is doing the DMA transfer, not us.
    - avoid double-unmapping of the DMA buffers on MMCI data errors.
    - don't check for negative values from the dmaengine tx submission
      function - Dan says this must never fail.
    - use new dmaengine helper functions rather than using the ugly function
      pointers directly.
    - allow DMA code to be fully optimized away using dma_inprogress() which
      is defined to constant 0 if DMA engine support is disabled.
    - request maximum segment size from the DMA engine struct device and
      set this appropriately.
    - removed checking of buffer alignment - the DMA engine should deal with
      its own restrictions on buffer alignment, not the individual DMA engine
      users.
    - removed setting DMAREQCTL - this confuses some DMA controllers as it
      causes LBREQ to be asserted for the last seven transfers, rather than
      six SREQ and one LSREQ.
    - removed burst setting - the DMA controller should not burst past the
      transfer size required to complete the DMA operation.
    Tested-by: NLinus Walleij <linus.walleij@linaro.org>
    Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
    c8ebae37
mmci.h 5.5 KB