- 27 11月, 2013 11 次提交
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由 Linus Walleij 提交于
This moves the MCDE pin control table out of the board file and into the device tree. Some pins and configs have been marked as used by sub-devices or slaves to the MCDE, such as I2C device 0-070 which is the HDMI interface circuit AV8100, but the pins rather belong to the MCDE SOC block as they come out of the main ASIC. The touch screen GPIO is not related to MCDE so this gets deleted and need to be tied to the respective touch screen (I2C) device once that device is added instead. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
As we need to connect resources such as pin mappings and clocks when deleting board files, we create a MCDE node even though there is no driver for it. As it is only using standard bindings right now, this does not matter much. When a proper driver is written for the MCDE, it can augment this node with custom properties. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This moves the SPI pin control table out of the board file and into the device tree. Move the specific setting for SSP0 on the HREFprev60 into the prev60-specific DTS file. The SPI2 configuration is not really connected to any device, as it will conflict with GPIO218 which is used on all HREFs. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This moves the MUSB pin control table out of the board file and into the device tree. Tie the config to the on-chip MUSB device rather than the ab8500-usb device which is off-chip. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This moves the input-pulled-up setting for GPIO217 as used on the HREFs prior to v60 from the boardfile to the device tree. GPIO218 is only used with the TVK UIB so move it to that .dtsi file. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This moves the static, device-tied pin control configuration out of the board file board-mop500-pins.c and into the device tree. Add nodes for MSP0 and MSP2 on the HREF and Snowball so we can reference the pins properly. Cc: Lee Jones <lee.jones@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This moves the static, device-tied pin control configuration out of the board file board-mop500-pins.c and into the device tree. Add entries for SDI1 and SDI2 on the Snowball so that the WLAN pins on SDI1 can be used further on, and the unused pins on SDI2 can be put to sleep. Cc: Lee Jones <lee.jones@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This moves the static, device-tied pin control configuration out of the board file board-mop500-pins.c and into the device tree. Define possible states also for I2C4 even if it's not used by any board file at this time. Cc: Lee Jones <lee.jones@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This moves the static, device-tied pin control configuration out of the board file board-mop500-pins.c and into the device tree. We create a new .dtsi-file to be shared between all the MOP500-related boards, that include all HREF variants and the Snowball board. Assign pin states for HREF and Snowball boards alike. Cc: Lee Jones <lee.jones@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Lee Jones 提交于
Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
The TC3589x devices appearing in the ST Ericsson device trees are adjusted to use the new binding so this is in a good shape, and we add the keypad on the TVK1281618 UIB so this is working again. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 13 11月, 2013 1 次提交
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由 NeilBrown 提交于
This allows the charger to be enabled with devicetree, and allows the parameters for charging the backup battery to be set. Signed-off-by: NNeilBrown <neilb@suse.de> Acked-by: NKumar Gala <galak@codeaurora.org> Acked-by: NGrant Likely <grant.likely@linaro.org> Signed-off-by: NAnton Vorontsov <anton@enomsg.org>
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- 11 11月, 2013 3 次提交
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由 Alexander Shiyan 提交于
Proper clock ID for USB OTG PHY is "usb_phy_gate". The patch changes this mismatch. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Felipe Balbi 提交于
Add missing nodes for the touchscreen available on AM335x EVM SK. Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
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由 Felipe Balbi 提交于
There was a spelling mistake on TSC/ADC binding where "coordinate" was spelled as "coordiante". We can't simply fix the error due to DT being an ABI, the approach taken was to first use correct spelling and if that fails, fall back to miss-spelled version. It's unfortunate that has creeped into the tree. Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
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- 05 11月, 2013 1 次提交
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由 Rob Herring 提交于
The DDR controller is slightly different in ECX-2000 and ECX-1000, so we need to have different nodes for each platform. Signed-off-by: NRob Herring <rob.herring@calxeda.com> [Device Tree documentation updated.] Signed-off-by: NRobert Richter <rric@kernel.org>
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- 04 11月, 2013 1 次提交
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由 Grant Likely 提交于
Commit 23616132, "of/irq: Refactor interrupt-map parsing" introduced a bug. The irq parsing will fail for some nodes that don't have a reg property. It is fixed by deferring the check for reg until it is actually needed. Also adjust the testcase data to catch the bug. Signed-off-by: NGrant Likely <grant.likely@linaro.org> Tested-by: NStephen Warren <swarren@nvidia.com> Tested-by: NMing Lei <tom.leiming@gmail.com> Tested-by: NStephen Warren <swarren@nvidia.com> Cc: Rob Herring <rob.herring@calxeda.com>
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- 01 11月, 2013 5 次提交
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由 Matt Porter 提交于
Trivial patch to make use of GIC/IRQ defines on the bcm11351 sdio interrupt properties. Signed-off-by: NMatt Porter <matt.porter@linaro.org> Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Tim Kryger 提交于
This adds in three more UARTs that were not declared earlier. Signed-off-by: NTim Kryger <tim.kryger@linaro.org> Reviewed-by: NMarkus Mayer <markus.mayer@linaro.org> Reviewed-by: NMatt Porter <matt.porter@linaro.org> Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Markus Mayer 提交于
Register GPIO 14 as card detect interrupt for the SD card slot. Signed-off-by: NMarkus Mayer <markus.mayer@linaro.org> Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Christian Daudt 提交于
Currently ARCH_BCM has been used for Broadcom Mobile V7 based SoCs. In order to allow other Broadcom SoCs to also use mach-bcm directory and files, this patch renames the original ARCH_BCM to ARCH_BCM_MOBILE, and uses ARCH_BCM to define any Broadcom chip residing in mach-bcm directory. Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Markus Mayer 提交于
Add the GPIO controller device node for the Broadcom bcm281xx family of mobile SoCs. Signed-off-by: NMarkus Mayer <markus.mayer@linaro.org> Reviewed-by: NTim Kryger <tim.kryger@linaro.org> Reviewed-by: NMatt Porter <matt.porter@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 31 10月, 2013 3 次提交
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由 Arnaud Ebalard 提交于
Main hardware parts of the (Armada 370 based) NETGEAR ReadyNAS 104 are supported by mainline kernel (USB 3.0 rear ports, USB 2.0 front port, Gigabit controller and PHYs, serial port, LEDs, buttons, SATA ports, G762 fan controller) and referenced in provided .dts file. Some additonal work remains for: - Intersil ISL12057 I2C RTC and Alarm chip: working driver but needs to be splitted for submission of RTC part first; - Front LCD (Winstar 1602G): driver needs to be written - Armada NAND controller (to access onboard 128MB of NAND): support being pushed by @free-electrons people - 4 front SATA LEDs controlled via GPIO brought by NXP PCA9554: driver is available upstream. Not referenced/tested yet. but the device is usable w/o those. Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Hiroshi Doyu 提交于
The IOMMU node's reg property contains completely bogus values! Somehow, this had no practical effect, despite the fact the IOMMU driver appears to be writing to those registers. I suppose that since no HW modules is actually at that address, the writes simply had no effect. Note that I'm not CCing stable here, even though the problem exists as far back as v3.9, simply because this patch doesn't fix any observed issue, and I don't want to run the risk of suddenly writing to some registers and causing a regression. Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com> [swarren, wrote commit description] Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Thomas Petazzoni 提交于
The OpenBlocks A7 board is designed and sold by PlatHome, and based on a Kirkwood 6283 Marvell SoC. It is quite similar to the OpenBlocks A6 already supported in the kernel, with the following main differences: - The A6 uses a RTC on I2C, while the A7 uses the internal SoC RTC. - The A6 has one Ethernet port, while the A7 has two Ethernet ports - The A6 has only one USB port, while the A7 integrates a USB hub, which provides two front-side USB port, and an internal USB port as well. - The A6 has 512 MB of RAM, while the A7 has 1 GB of RAM. - Slightly different GPIOs for some functions. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NAndrew Lunn <andrew@lunn.ch> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 30 10月, 2013 11 次提交
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由 Tomi Valkeinen 提交于
New u-boot versions no longer set the pinmuxing for Panda's DPI output, and the muxing has to be done in the .dts file. Add pinmuxing for DPI and TFP410. Without these, the DVI output on Panda does not work with recent u-boot. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Lokesh Vutla 提交于
Add the AM33xx RNG module's device tree data. Also add Documentation file describing the data for the RNG module. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Suman Anna 提交于
Add the hwspinlock device tree node for AM33xx family of SoCs. Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Suman Anna 提交于
Add the hwspinlock device tree node for OMAP5 SoCs. Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Suman Anna 提交于
Add the hwspinlock device tree node for OMAP4 family of SoCs. Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Jingoo Han 提交于
Set the default status for PCIe to disabled in the exynos5440.dtsi file and let the board dts files such as exynos5440-ssdk5440.dts enable the PCIe. However, keep the PCIe for SD5v1 board disabled, because there is no PCIe slot on SD5v1 board. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Renwei Wu 提交于
here prima2 i2c node is lacking of address-cells and size-cells. Signed-off-by: NRenwei Wu <Renwei.Wu@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Barry Song 提交于
here we need to add missed cell, cs and dma channels prop in SPI nodes to match with drivers. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Jiansong Chen 提交于
there is a bus bridge for graphics 2D module lost in current dts, this patch takes it back. Signed-off-by: NJiansong Chen <jiansong.chen@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Barry Song 提交于
CPHIF(Cell phone interface) is behind sys bridge, this patch adds the missed node. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Ye He 提交于
memcontrol-monitor provides the ability of monitoring the memory bandwidth. Signed-off-by: NYe He <ye.he@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 29 10月, 2013 2 次提交
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由 Grant Likely 提交于
Two of the versatile irq definitions are incorrect, mostly because two devices have connections to more than one interrupt controller. Fix them by using the new interrupts-extended property to fan out without using an awful interrupt-map nexus node. Signed-off-by: NGrant Likely <grant.likely@linaro.org>
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由 Grant Likely 提交于
The standard interrupts property in device tree can only handle interrupts coming from a single interrupt parent. If a device is wired to multiple interrupt controllers, then it needs to be attached to a node with an interrupt-map property to demux the interrupt specifiers which is confusing. It would be a lot easier if there was a form of the interrupts property that allows for a separate interrupt phandle for each interrupt specifier. This patch does exactly that by creating a new interrupts-extended property which reuses the phandle+arguments pattern used by GPIOs and other core bindings. Signed-off-by: NGrant Likely <grant.likely@linaro.org> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NKumar Gala <galak@codeaurora.org> [grant.likely: removed versatile platform hunks into separate patch] Cc: Rob Herring <rob.herring@calxeda.com>
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- 24 10月, 2013 1 次提交
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由 Grant Likely 提交于
This patch extends the DT selftest code with some test cases for the interrupt parsing functions. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 23 10月, 2013 1 次提交
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由 Ezequiel Garcia 提交于
The Armada 370/XP SoC has a clock provider called "Core Divider", that is derived from a fixed 2 GHz PLL clock. Reviewed-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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