Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Rip out a bunch of redundant PCI-E Memory Window Read/Write routines,
collapse the more general purpose routines into a single routine
thereby eliminating the need for a large stack frame (and extra data
copying) in the outer routine, change everything to use the improved
routine t4_memory_rw.

Based on origninal work by Casey Leedom <leedom@chelsio.com> and
Steve Wise <swise@opengridcomputing.com>
Signed-off-by: NCasey Leedom <leedom@chelsio.com>
Signed-off-by: NSteve Wise <swise@opengridcomputing.com>
Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Use the firmware interface to get the BAR0 value since we really don't want
to use the PCI-E Configuration Space Backdoor access which is owned by the
firmware.

Set up PCI-E Memory Window registers using the true values programmed into
BAR registers.  When the PF4 "Master Function" is exported to a Virtual
Machine, the values returned by pci_resource_start() will be for the
synthetic PCI-E Configuration Space and not the real addresses. But we need
to program the PCI-E Memory Window address decoders with the real addresses
that we're going to be using in order to have accesses through the Memory
Windows work.

Based on origninal work by Casey Leedom <leedom@chelsio.com>
Signed-off-by: NCasey Leedom <leedom@chelsio.com>
Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Change logic which determines our Physical Function at PCI Probe time.
Now we read the PL_WHOAMI register and get the Physical Function.

Pass Physical Function to Upper Layer Drivers in lld_info structure in the
new field "pf" added to lld_info.  This is useful for the cases where the
PF, say PF4, is attached to a Virtual Machine via some form of "PCI
Pass Through" technology and the PCI Function shows up as PF0 in the VM.

Based on original work by Casey Leedom <leedom@chelsio.com>
Signed-off-by: NCasey Leedom <leedom@chelsio.com>
Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

There are linux distributions where the inbox bnx2x driver contains SRIOV
support but doesn't contain the changes introduced in b9871bcf
"bnx2x: VF RSS support - PF side".

A VF in a VM running that distribution over a new hypervisor will access
incorrect addresses when trying to transmit packets, causing an attention
in the hypervisor and making that VF inactive until FLRed.

The driver in the VM has to ne upgraded [no real way to overcome this], but
due to the HW attention currently arising upgrading the driver in the VM
would not suffice [since the VF needs also be FLRed if the previous driver
was already loaded].

This patch causes the PF to fail the acquire message from a VF running an
old problematic driver; The VF will then gracefully fail it's probe preventing
the HW attention [and allow clean upgrade of driver in VM].
Signed-off-by: NYuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: NAriel Elior <Ariel.Elior@qlogic.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

This improves the performance of driver on machine with L1_CACHE_SHIFT of at
most 32 bytes [HW was planned for 64-byte aligned fastpath data].
Signed-off-by: NDmitry Kravkov <Dmitry.Kravkov@qlogic.com>
Signed-off-by: NYuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: NAriel Elior <Ariel.Elior@qlogic.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Until now VFs were oblvious to the actual configured link parameters.
This patch does 2 things:

  1. It enables a PF to inform its VF using the bulletin board of the link
     configured, and allows the VF to present that information.

  2. It adds support of `ndo_set_vf_link_state', allowing the hypervisor
     to set the VF link state.
Signed-off-by: NDmitry Kravkov <Dmitry.Kravkov@qlogic.com>
Signed-off-by: NYuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: NAriel Elior <Ariel.Elior@qlogic.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Checkpatch issued a warning preferring to use kstrto<type> when
using a single variable sscanf.  Change the sscanf invocation to
a kstrtouint call.
Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Currently the driver makes use of the additional mac address
registers in the hardware to provide perfect filtering.  The
hardware can also have a set of hash table registers that can
be used for imperfect filtering.  By using imperfect filtering
the additional mac address registers can be used for layer 2
filtering support.  Use the hash table registers if the device
has them.
Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

This patch adds support for (imperfect) filtering of
VLAN tag ids using a 16-bit filter hash table.  When
VLANs are added, a 4-bit hash is calculated with the
result indicating the bit in the hash table to set.
This table is used by the hardware to drop packets with
a VLAN id that does not hash to a set bit in the table.
Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

When receiving a VLAN packet check to be sure that VLAN
RX CTAG stripping is enabled before indicating that the
tag has been stripped in the packet information data
structure.
Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

The MAC_VLAN_Incl register (0x0060) must be set to indicate
that the VLAN tag to be inserted comes from a Tx context
descriptor and not the MAC_VLAN_Incl register.  Also, even
though it is the default, explicitly set the type of tag to
be inserted as a CTAG.
Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

In order to avoid conflicts with other include files, add
a prefix to the defines in xgbe.h.
Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

There were a couple of fields in the fdir descriptor setup that
were not being reprogrammed, which left the opportunity for stale
data to be pushed as part of the descriptor next time it was used.

Change-ID: Ieee5c96a7d4713d469693f086c4854de949a7633
Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

"fd current cnt" can be used to print the total filters consumed
by this interface, this includes guaranteed and best effort filters.

Change-ID: I2c417810c4999ce1388d2ea26f8e69679ba33966
Signed-off-by: NAnjali Singhai Jain <anjali.singhai@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Hardware does not have a way of telling a PF how much of the global
shared FD table space is still available or is consumed.
Previously, every PF but PF0 would think there was still space available
when there wasn't. The PFs would continue to try to add filters and fail.
With this new logic if a filter programming error is detected we just
check if we are close to the guaranteed space full and that can be used
as a hint to say, there might not be space and we should turn off the
features. This way we can turn off the feature in SW for all PFs in
time.

Change-ID: I725cb2fab16c033f883056362b4542c1400503c5
Signed-off-by: NAnjali Singhai Jain <anjali.singhai@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

There wasn't a need to play the logic twice, it seems
like a left over from when we had to add two PTYPEs for
one filter. There should be no change in the number of
filters that actually got added to the hardware.

Change-ID: I5071d02eafd020b60e30eb96219f110f334eec85
Signed-off-by: NAnjali Singhai Jain <anjali.singhai@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Currently every time we run through the i40e_ptp_init routine, we create
a new device node. This function is called by i40e_reset_and_rebuild
which is used to handle reset of the device. Even though the 1588
registers only get cleared on a GLOBAL reset, this function is still
called to handle a CORE reset.

This causes a leak of PTP device nodes at every reset. To fix this,
break PTP device clock node creation out of i40e_ptp_init, and only call
this if we don't already have a device created. Further invocation of
i40e_ptp_init will not generate new PTP devices. Instead, only the
necessary work required to reconfigure 1588 will be done.

This change also fixes an issue where a reset can cause the
device to forget it's timestamp configuration, and revert to the default
mode.

Change-ID: I741d01c61d9fe1d24887859d1316e1a8a892909e
Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

This patch prevents the SIOCGHWTSTAMP ioctl from possibly returning bad
data, by not permanently storing the setting into the private
structure until after we've finished validating that we can support it.

Change-ID: Ib59f9b4f73f451d5a2e76fb8efa5d4271b218433
Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

This patch facilitates future work by breaking the PTP hardware control
bits out of the i40e_set_ts_config function. By doing this, we can
maintain state about the 1588 timestamping mode and properly re-enable
to the last known mode during a re-initialize of 1588 bits.

This patch also modifies i40e_ptp_init to call the
i40e_ptp_set_timestamp_mode during the reconfiguration process. A
future patch will ensure that the hwtstamp_config structure is not reset
during this process, so that timestamp mode will be maintained across a
reset.

Change-ID: Ic20832c96c5c512ac203b6c7534e10d891c560f0
Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Reduces possible confusion and ambiguity in purpose of the ancillary
feature control entry point function.

Change-ID: I21d773c1a86878f6d061505185b596c788d1b7cc
Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Sometimes the firmware will not indicate an error but fail to pass a
message between the VF and the PF driver. If this happens, just resend
the request.

This fixes an initialization failure if many VFs are instantiated at the
same time and the VF module is autoloaded.

Change-ID: Idd1ad8da2fd5137859244685c355941427d317d7
Signed-off-by: NMitch Williams <mitch.a.williams@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Correct a missing word in a log message.

Change-ID: Id94da7d9f842382d073b3947e0b616503e2f8e91
Signed-off-by: NMitch Williams <mitch.a.williams@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

When verifying the API version (which is the first time the driver
communicates with the firmware and thus the PF driver), there are many
ways in which a failure can occur. There may be an error from the
firmware, there may be unresponsive firmware, there may be an error from
the PF driver, etc, etc.

Make this function return more useful information, instead of just -EIO.
Propagate FW errors back to the caller, and log a message if the PF
sends an invalid reply.

Change-ID: I3e9135a2b80f7acdb855f62f12b2b2668c9a8951
Signed-off-by: NMitch Williams <mitch.a.williams@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

If the VF driver fails to complete early init, then rmmod can cause a
softlock when the driver tries to stop a watchdog timer that never even
got initialized.

Add a check to see if the timer is actually initialized before stopping
it.

Change-ID: Id9d550aa8838e07f4b02afe7bc017ef983779efc
Signed-off-by: NMitch Williams <mitch.a.williams@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Fix HMC handling for big endian architectures.

Change-ID: Id8c46fc341815d47bfe0af8b819f0ab9a1e9e515
Signed-off-by: NPaul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

We do not need to acquire NVM for Shadow RAM XSUM calculation, as we only
read from SR through SRCTL register for which having the ownership is not
required.

Change-ID: Ie238a8f09917d1d25f24cc7cec271951ac7b98f2
Signed-off-by: NKamil Krawczyk <kamil.krawczyk@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

If CONFIG_RFS_ACCEL=n:

drivers/net/ethernet/cisco/enic/enic_main.c: In function 'enic_open':
drivers/net/ethernet/cisco/enic/enic_main.c:1603:2: error: implicit declaration of function 'enic_rfs_flw_tbl_init' [-Werror=implicit-function-declaration]
drivers/net/ethernet/cisco/enic/enic_main.c: In function 'enic_stop':
drivers/net/ethernet/cisco/enic/enic_main.c:1630:2: error: implicit declaration of function 'enic_rfs_flw_tbl_free' [-Werror=implicit-function-declaration]

Introduced in commit a145df23 ("enic: Add
Accelerated RFS support").

Dummy functions are provided, but their prototypes are missing, causing the
build failure.  Provide dummy static inline functions instead to fix this.
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

If the mdio probe function fails in emac_open, the interrupt we just requested
isn't freed. If emac_open is called again, for example because we try to set up
the interface again, the kernel will oops because the interrupt wasn't properly
released.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Cc: <stable@vger.kernel.org> # 3.11+
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

o QLogic has acquired the NetXtremeII products and drivers from Broadcom.
  This patch re-brands cnic driver as a QLogic driver
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

o QLogic has acquired the NetXtremeII products and drivers from Broadcom.
  This patch re-brands bnx2 driver as a QLogic driver
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Commit 3f85944f ("net: Add sysfs file
for port number") introduce dev_port to network devices. cxgb4 adapters
have multiple ports on the same PCI function, and used dev_id to
identify those ports. That use was removed by commit
8c367fcb ("cxgb4: Do not set
net_device::dev_id to VI index"), since dev_id should be used only when
devices share the same MAC address.

Using dev_port for cxgb4 allows different ports on the same PCI function
to be identified.
Signed-off-by: NThadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Commit 506724c4 "tg3: Override clock,
link aware and link idle mode during NVRAM dump" changed the timeout
value for nvram command execution from 100ms to 1ms. But the 1ms
timeout value was only sufficient for nvram read operations but not
write operations for most of the devices supported by tg3 driver.
This patch sets the MAX to 50ms. Also it uses usleep_range instead
of udelay.
Signed-off-by: NPrashant Sreedharan <prashant@broadcom.com>
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Suggested-by: NDavid Miller <davem@davemloft.net>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Bump versions.

Change-ID: I47fc3433240800cd823ff512f3015822277b0d20
Signed-off-by: NCatherine Sullivan <catherine.sullivan@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

When a Tx hang happens, usually the Tx queue disable fails. At
this point if we try to recover by a VSI reinit the HW gets
unhappy and we get a Malicious Driver Detect (MDD) event.
HW expects a PF reset if a queue disable fails, if we don't do a PF
reset and restart the queue we get an MDD.  This patch makes sure we
do a PF reset on Tx hang and that way we avoid any MDD because of Tx
queue disable failure.

Change-ID: I665ab6223577c788da857ee2132e733dc9a451e4
Signed-off-by: NAnjali Singhai Jain <anjali.singhai@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

The PF reset to clean up at the end of the remove is a nice thing
to do, but it also removes any LAA setting that Wake On LAN wants
for future wake up.

Change-ID: Ic090ec714df2d722281d11735cf75f2aa4432e2c
Signed-off-by: NShannon Nelson <shannon.nelson@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

The LAA is lost on a reset, so be sure to replay it when rebuilding
the switch after any reset.

Change-ID: I6e643f9a59dfd899b6cbdf84d93b4bc9c37bb949
Signed-off-by: NShannon Nelson <shannon.nelson@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Don't short-circuit the LAA assignment when the driver thinks it has
already been done - it is possible that the user might want to force
the address setting again.  At the same time, this requires a little
re-ordering of the filter management.

Change-ID: Ia0d71e3bc04edd7b68cf67edecc00abe7b9f6639
Signed-off-by: NShannon Nelson <shannon.nelson@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Make sure the Firmware sets up the LAA as a Wake-On-LAN address.

Change-ID: I57b9acd8c288424fcfed0911053eb725c400b41c
Signed-off-by: NShannon Nelson <shannon.nelson@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>