- 09 9月, 2012 1 次提交
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由 Yunfan Zhang 提交于
The primary handler will NOT be called if the interrupt nests into another interrupt thread. Remove it to avoid confusing. Signed-off-by: NYunfan Zhang <yfzhang@marvell.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 31 8月, 2012 1 次提交
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由 Xiaofan Tian 提交于
Currently, regmap will write 1 to mask_base to mask an interrupt and write 0 to unmask it. But some chips do not have an interrupt mask register, and only have interrupt enable register. Then we should write 0 to disable interrupt and 1 to enable. So add an mask_invert flag to handle this. If it is not set, behavior is same as previous. If set it to 1, the mask value will be inverted before written to mask_base Signed-off-by: NXiaofan Tian <tianxf@marvell.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 08 8月, 2012 1 次提交
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由 Mark Brown 提交于
Some devices need to have a runtime PM reference while handling interrupts to ensure that the register I/O is available. Support this with a flag in the chip. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 04 8月, 2012 6 次提交
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由 Stephen Warren 提交于
The kerneldoc for irq_set_irq_wake() says: Enable/disable power management wakeup mode, which is disabled by default. regmap_irq_set_wake() clears bits to enable wake for an interrupt, and sets bits to disable wake. Hence, we should set all bits in wake_buf initially, to mirror the expected disabled state. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Stephen Warren 提交于
If a regmap-irq chip has no wake base: * There's no point calling .irq_set_wake, hence IRQCHIP_SKIP_SET_WAKE. * If some IRQs in the chip are enabled for wake and some aren't, we should mask those interrupts that are not wake enabled, so that if they occur during suspend, the system is not awoken. Hence, IRQCHIP_MASK_ON_SUSPEND. Note that IRQCHIP_MASK_ON_SUSPEND is handled by check_wakeup_irqs(), which always iterates over every single interrupt in the system, irrespective of whether an interrupt is a child of a controller whose output interrupt has no wake-enabled inputs and hence is presumably masked itself. Hence this change might cause interrupt unnecessary masking operations and associated register I/O. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Stephen Warren 提交于
This is intended to give each irq_chip a useful name, rather than hard- coding them all as "regmap". Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Stephen Warren 提交于
This will allow later patches to adjust portions of the irq_chip individually for each regmap_irq_chip that is created. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
Don't write the full register, it's possible there's bits other than the masks in the same register which we shouldn't be changing. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Tested-by: NStephen Warren <swarren@wwwdotorg.org>
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由 Stephen Warren 提交于
A number of places in the code were printing error messages that included the address of a register, but were not calculating the register address in the same way as the access to the register. Use a temporary to solve this. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 05 6月, 2012 2 次提交
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由 Mark Brown 提交于
Allow chips to provide a bank of registers for controlling the wake state in a similar fashion to the masks and propagate the wake count to the parent interrupt controller. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
If the driver supplied an empty entry in the array of IRQs then return an error rather than trying to do the mapping. This is intended for use with handling chip variants and similar situations. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 03 6月, 2012 1 次提交
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由 Mark Brown 提交于
We should never be modifying it and it lets drivers declare it const. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 18 5月, 2012 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 15 5月, 2012 1 次提交
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由 Graeme Gregory 提交于
In some chips the IRQ status registers are not contiguous in the register map but spaced at even spaces. This is an easy case to handle with minor changes. It is assume for this purpose that the stride for status is equal to the stride for mask/ack registers as well. Signed-off-by: NGraeme Gregory <gg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 14 5月, 2012 2 次提交
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由 Mark Brown 提交于
This gets us up to date with the recommended current kernel infrastructure and should transparently give us device tree interrupt bindings for any devices using the framework. If an explicit IRQ mapping is passed in then a legacy interrupt range is created, otherwise a simple linear mapping is used. Previously a mapping was mandatory so existing drivers should not be affected. A function regmap_irq_get_virq() is provided to allow drivers to map individual IRQs which should be used in preference to the existing regmap_irq_chip_get_base() which is only valid if a legacy IRQ range is provided. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
It's needed for freeing and for obtaining the IRQ base later on. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 13 4月, 2012 2 次提交
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由 Stephen Warren 提交于
Commit f01ee60f ("regmap: implement register striding") caused the compile errors below. Fix them. drivers/base/regmap/regmap-irq.c: In function 'regmap_irq_sync_unlock': drivers/base/regmap/regmap-irq.c:62:12: error: 'map' undeclared (first use in this function) drivers/base/regmap/regmap-irq.c:62:12: note: each undeclared identifier is reported only once for each function it appears in drivers/base/regmap/regmap-irq.c: In function 'regmap_irq_enable': drivers/base/regmap/regmap-irq.c:77:37: error: 'map' undeclared (first use in this function) drivers/base/regmap/regmap-irq.c: In function 'regmap_irq_disable': drivers/base/regmap/regmap-irq.c:85:37: error: 'map' undeclared (first use in this function) Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Stephen Warren 提交于
regmap_config.reg_stride is introduced. All extant register addresses are a multiple of this value. Users of serial-oriented regmap busses will typically set this to 1. Users of the MMIO regmap bus will typically set this based on the value size of their registers, in bytes, so 4 for a 32-bit register. Throughout the regmap code, actual register addresses are used. Wherever the register address is used to index some array of values, the address is divided by the stride to determine the index, or vice-versa. Error- checking is added to all entry-points for register address data to ensure that register addresses actually satisfy the specified stride. The MMIO bus ensures that the specified stride is large enough for the register size. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 11 4月, 2012 1 次提交
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由 Stephen Warren 提交于
Commit f01ee60f ("regmap: implement register striding") caused the compile errors below. Fix them. drivers/base/regmap/regmap-irq.c: In function 'regmap_irq_sync_unlock': drivers/base/regmap/regmap-irq.c:62:12: error: 'map' undeclared (first use in this function) drivers/base/regmap/regmap-irq.c:62:12: note: each undeclared identifier is reported only once for each function it appears in drivers/base/regmap/regmap-irq.c: In function 'regmap_irq_enable': drivers/base/regmap/regmap-irq.c:77:37: error: 'map' undeclared (first use in this function) drivers/base/regmap/regmap-irq.c: In function 'regmap_irq_disable': drivers/base/regmap/regmap-irq.c:85:37: error: 'map' undeclared (first use in this function) Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 10 4月, 2012 1 次提交
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由 Stephen Warren 提交于
regmap_config.reg_stride is introduced. All extant register addresses are a multiple of this value. Users of serial-oriented regmap busses will typically set this to 1. Users of the MMIO regmap bus will typically set this based on the value size of their registers, in bytes, so 4 for a 32-bit register. Throughout the regmap code, actual register addresses are used. Wherever the register address is used to index some array of values, the address is divided by the stride to determine the index, or vice-versa. Error- checking is added to all entry-points for register address data to ensure that register addresses actually satisfy the specified stride. The MMIO bus ensures that the specified stride is large enough for the register size. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 12 3月, 2012 1 次提交
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由 Paul Gortmaker 提交于
For files that are actively using linux/device.h, make sure that they call it out. This will allow us to clean up some of the implicit uses of linux/device.h within include/* without introducing build regressions. Yes, this was created by "cheating" -- i.e. the headers were cleaned up, and then the fallout was found and fixed, and then the two commits were reordered. This ensures we don't introduce build regressions into the git history. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
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- 06 12月, 2011 1 次提交
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由 Mark Brown 提交于
Allows devices to discover their own interrupt without having to remember it themselves. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 29 11月, 2011 1 次提交
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由 Mark Brown 提交于
While the IRQ core doesn't currently support shared threaded interrupts that's no reason for drivers not to do their bit and report IRQ_NONE when they don't get an interrupt. This allows the core spurious/wedget interrupt detection support to do its thing. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 08 11月, 2011 1 次提交
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由 Mark Brown 提交于
There seem to be lots of regmap-using devices with very similar interrupt controllers with a small bank of interrupt registers and mask registers with an interrupt per bit. This won't cover everything but it's a good start. Each chip supplies a base for the status registers, a base for the mask registers, an optional base for writing acknowledgements (which may be the same as the status registers) and an array of bits within each of these register banks which indicate the interrupt. There is an assumption that the bit for each interrupt will be the same in each of the register bank. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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