As of commit 9a1091ef ("irqchip: gic: Support hierarchy irq
domain."), the APE6EVM legacy board support is known to be broken.

The IRQ numbers of the GIC are now virtual, and no longer match the
hardcoded hardware IRQ numbers in the legacy platform board code.

To fix this issue specific to non-muliplatform r8a73a4 and APE6EVM:
 1) Instantiate the GIC from platform board code and also
 2) Skip over the DT arch timer as well as
 3) Force delay setup based on DT CPU frequency

With these 3 fixes in place interrupts on APE6EVM are now unbroken.

Partially based on legacy GIC fix by Geert Uytterhoeven, thanks to
him for the initial work.
Signed-off-by: NMagnus Damm <damm+renesas@opensource.se>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The information is already included in the COPYING file in the kernel
sources root directory, we don't want to modify all source files when
the FSF will move to a new address, and I'm tired of seeing the related
checkpatch.pl warnings.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The r8a73a4 DTS includes CPU Frequency information so
adjust the APE6EVM board code to use shmobile_init_delay()
instead of relying on CPU Frequency information included
in r8a73a4_init_delay() that is specified in C.
Signed-off-by: NMagnus Damm <damm+renesas@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Extend board specific APE6EVM reference machine vectors to include
shmobile_init_late() so Suspend-to-RAM and CPUIdle are setup as expected.
Signed-off-by: NMagnus Damm <damm+renesas@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

A number of board files in arch/arm and arch/unicore32
explicitly reference platform_bus device as a parent
for new platform devices.

This is unnecessary, as platform device API guarantees
that devices with NULL parent are going to by adopted
by the mentioned "root" device.

This patch removes or replaces with NULL such references.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Acked-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Change location of r8a73a4.h so it can be included as "r8a73a4.h"
instead of the old style <mach/r8a73a4.h>
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Change location for common.h so it can be used as #include "common.h"
instead of the old style #include <mach/common.h>.
Signed-off-by: NMagnus Damm <damm+renesas@opensource.se>
Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Move most of irqs.h so it can be used as #include "irqs.h"
instead of the old style #include <mach/irqs.h>.

Legacy code in drivers/pinctrl needs more work to get rid
of the "mach" portion of the include path, so some part
is left in the original location.
Signed-off-by: NMagnus Damm <damm+renesas@opensource.se>
Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
[horms+renesas@verge.net.au: Do not add trailing blank line to irqs.h]
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

sh_mobile_sdhi driver doesn't care resource name.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

sh_mmcif driver doesn't care resource name.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add DMA support for MMCIF on APE6EVM, using the shdma dmaengine driver.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

__initdata tag should be placed between the variable name and equal
sign for the variable to be placed in the intended .init.data section.
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

MMCIF on r8a73a4 doesn't support Command Completion Signal, a platform
parameter has to be added to disable it on ape6evm.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Currently a dummy fixed always-on regulator is used for all 3 SD/MMC
interfaces on ape6evm. This patch updates the board to use correct supplies
for MMC0, SDHI0 and SDHI1 VDD. SDHI0 VccQ supply regulator should be
implemented in a separate patch.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Rename r8a73a4_init_delay() into r8a73a4_init_early()
to make the function name show that more than just
delay setup may happen in the future.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The board has 6 LEDs connected to GPIOs. Add a led-gpio device to
support them.
Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The ape6evm board has switches S16 - S23 wired up to GPIO pins.
This patch allows access to those pins as gpio-keys.
Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Leave ->init_time() set to NULL to use the default ARM behaviour.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This patch adds __initconst markers to the platform data and resources,
used on ape6evm as parameters to platform_device_register_resndata().
The data is duplicated inside that function, therefore original data
can be discarded after initialisation is completed.
Reported-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add support for SDHI0 and SDHI1 on APE6EVM in PIO mode only.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add MMCIF support to the APE6EVM board in PIO mode only. Power supply is
fixed for now, eventually support for the tps80032 regulator, also
supplying both VDD and VccQ to the MMCIF slot should be added to APE6EVM.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Update the r8a73a4 code to allow using other
timers than Arch timer for clock event
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Remove redundant irqchip_init() callback. The default case
of NULL will result in invoking irqchip_init() anyway.
Signed-off-by: NMagnus Damm <damm@opensource.se>
[ horms+renesas@verge.net.au: Trimmed patch to remove portion
  that updates the r8a73a4 SoC and altered the subject to
  use the same format as the patch that updates the r8a73a4. ]
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The orignal commit 3263e09d287fbaa8a9424b5e69396599a3bbd518
(ARM: shmobile: Initial r8a73a4 SoC support V3)
put MP clock parent as EXTAL2, but its code was removed
on DIV6 clock support commit.
This patch makes it consistent.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add LAN9220 support to the APE6EVM board using C and DT.
At this point the PFC driver lacks DT bindings so to
configure the PFC we use PINCTRL in C board code.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Start using the r8a73a4 PFC on the APE6EVM board
and configure the SCIFA0 console signals in the
PFC via PINCTRL.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

V3 of APE6EVM base board support making use of
1 GiB of memory, the SCIFA0 serial port and
ARM architected timer.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add basic Bock-W board support

More devices will be added on top of this patch after
PICNTRL and clock framework are in better shape.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add initial support for the R8A7778 R-Car M1A SoC.
No static virtual mappings are used, all the components
make use of ioremap().
DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.

It is based on v1.0 datasheet
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

In devices using ehci-sh, initialization of the PHY may be necessary.
This adds platform data to ehci-sh and provide function to initialize PHY.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Shimoda, Yoshihiro <yoshihiro.shimoda.uh@renesas.com>
Acked-by: NPaul Mundt <lethal@linux-sh.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Current sh-hspi had used platform-specific speed.
This patch remove it, and use spi_transfer specific speed.
It removes unnecessary flags from struct sh_hspi_info,
but struct sh_hspi_info is still exist, since sh-hspi needs
platform info in the future.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

This patch adds SuperH HSPI driver.
It is still prototype driver, but has enough function at this point.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Now that most platforms don't need disable_fiq and arch_ret_to_user
macros, we can remove the empty macros or empty entry-macro.S files.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NJamie Iles <jamie@jamieiles.com>
Acked-by: NNicolas Pitre <nico@linaro.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NRyan Mallon <rmallon@gmail.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>

Even when CONFIG_MULTI_IRQ_HANDLER is selected, the core code
requires the arch_irq_handler_default macro to be defined as
a fallback.

It turns out nobody is using that particular feature as both PXA
and shmobile have all their machine descriptors populated with
the interrupt handler, leaving unused code (or empty macros) in
their entry-macro.S file just to be able to compile entry-armv.S.

Make CONFIG_MULTI_IRQ_HANDLER exclusive wrt arch_irq_handler_default,
which allows to remove one test from the hot path. Also cleanup both
PXA and shmobile entry-macro.S.

Cc: Paul Mundt <lethal@linux-sh.org>
Acked-by: NNicolas Pitre <nico@linaro.org>
Acked-by: NEric Miao <eric.y.miao@gmail.com>
Tested-by: NJamie Iles <jamie@jamieiles.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

PPI handling is a bit of an odd beast. It uses its own low level
handling code and is hardwired to the local timers (hence lacking
a registration interface).

Instead, switch the low handling to the normal SPI handling code.
PPIs are handled by the handle_percpu_devid_irq flow.

This also allows the removal of some duplicated code.

Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Tested-by: NDavid Brown <davidb@codeaurora.org>
Tested-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Remove now unused IRQ demux code. All R-Mobile and
SH-Mobile processors should register IRQ demux
handlers during run-time.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Fix interrupt priority level handling on SH-Mobile ARM.

SH-Mobile ARM platforms using multiple interrupt priority
levels need this patch to fix a potential dead lock that
may occur if multiple interrupts with different levels
are pending simultaneously.

The default INTC configuration is to use the same priority
level for all interrupts, so this issue does not trigger by
default. It is however common for board code to override the
interrupt priority for certain interrupt sources depending
on the application. Without this fix such boards may lock up.

In detail, this patch updates the INTC code in entry-macro.S
to make sure that the INTLVLA register gets set as expected.

To trigger this bug modify the board specific code to adjust
the interrupt priority level for the ethernet chip. After
changing the priority level simply use flood ping to drown
the board with interrupts.

This patch applies to INTCA-based processors such as sh7372,
sh7377 and sh7372. GIC-based processors are not affected.

Suitable for v2.6.37-rc and stable from v2.6.34 to v2.6.36.

Cc: stable@kernel.org
Signed-off-by: NMagnus Damm <damm@opensource.se>
Tested-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Presently the entry macros are all globbed together, this simply splits
them out in to their insular variants. Future work such as the GIC
generalization will replace some of these and tidy the abstraction up
further.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch adds initial support for Renesas SH-Mobile AG5.

At this point the AG5 CPU support is limited to the ARM
core, SCIF serial and a CMT timer together with L2 cache
and the GIC. The AG5EVM board also supports Ethernet.

Future patches will add support for GPIO, INTCS, CPGA
and platform data / driver updates for devices such as
IIC, LCDC, FSI, KEYSC, CEU and SDHI among others.

The code in entry-macro.S will be cleaned up when the
ARM IRQ demux code improvements have been merged.

Depends on the AG5EVM mach-type recently registered but
not yet present in arch/arm/tools/mach-types.

As the AG5EVM board comes with 512MiB memory it is
recommended to turn on HIGHMEM.

Many thanks to Yoshii-san for initial bring up.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Optimize the SH-Mobile interrupt assembly macros to avoid
reloading the INTFLGA register address in case of multiple
pending interrupts. Kindly pointed out by Russell King.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>