1. 27 3月, 2015 2 次提交
  2. 19 3月, 2015 1 次提交
  3. 17 3月, 2015 3 次提交
  4. 15 3月, 2015 1 次提交
  5. 12 3月, 2015 2 次提交
  6. 11 3月, 2015 1 次提交
    • G
      ARM: shmobile: R-Car Gen2: Add da9063/da9210 regulator quirk · 663fbb52
      Geert Uytterhoeven 提交于
      The r8a7790/lager and r8a7791/koelsch development boards have da9063 and
      da9210 regulators.  Both regulators have their interrupt request lines
      tied to the same interrupt pin (IRQ2) on the SoC.
      
      After cold boot or da9063-induced restart, both the da9063 and da9210
      seem to assert their interrupt request lines.  Hence as soon as one
      driver requests this irq, it gets stuck in an interrupt storm, as it
      only manages to deassert its own interrupt request line, and the other
      driver hasn't installed an interrupt handler yet.
      
      To handle this, install a quirk that masks the interrupts in both the
      da9063 and da9210.  This quirk has to run after the i2c master driver
      has been initialized, but before the i2c slave drivers are initialized.
      As it depends on i2c, select I2C if one of the affected platforms is
      enabled in the kernel config.
      
      On koelsch, the following happens:
      
        - Cold boot or reboot using the da9063 restart handler:
      
      	IRQ2 is asserted, installing da9063/da9210 regulator quirk
      	...
      	i2c i2c-6: regulator_quirk_notify: 1, IRQC_MONITOR = 0x3fb
      	i2c 6-0058: regulator_quirk_notify: 1, IRQC_MONITOR = 0x3fb
      	i2c 6-0058: Detected da9063
      	i2c 6-0058: Masking da9063 interrupt sources
      	i2c 6-0068: regulator_quirk_notify: 1, IRQC_MONITOR = 0x3fb
      	i2c 6-0068: Detected da9210
      	i2c 6-0068: Masking da9210 interrupt sources
      	i2c 6-0068: IRQ2 is not asserted, removing quirk
      
        - Warm boot (reset button):
      
      	rcar_gen2_regulator_quirk: IRQ2 is not asserted, not installing quirk
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Tested-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
      Reviewed-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      663fbb52
  7. 24 2月, 2015 3 次提交
  8. 19 2月, 2015 1 次提交
    • U
      ARM: make arrays containing machine compatible strings const · 543c5040
      Uwe Kleine-König 提交于
      The definition
      
      	static const char *axxia_dt_match[] __initconst = {
      		...
      
      defines a changable array of constant strings. That is you must not do:
      
      	*axxia_dt_match[0] = 'k';
      
      but
      
      	axxia_dt_match[0] = "different string";
      
      is fine. So the annotation __initconst is wrong and yields a compiler
      error when other really const variables are added with __initconst.
      
      As the struct machine_desc member dt_compat is declared as
      
      	const char *const *dt_compat;
      
      making the arrays const is the better alternative over changing all
      annotations to __initdata.
      Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      543c5040
  9. 06 2月, 2015 1 次提交
  10. 29 1月, 2015 2 次提交
  11. 17 1月, 2015 2 次提交
    • M
      ARM: shmobile: r8a7779: Instantiate GIC from C board code in legacy builds · f469cde2
      Magnus Damm 提交于
      As of commit 9a1091ef ("irqchip: gic: Support hierarchy irq
      domain."), Marzen legacy hangs during boot with:
      
         Image Name:   'Linux-3.19.0-rc4'
         Image Type:   ARM Linux Kernel Image (uncompressed)
         Data Size:    3445880 Bytes = 3.3 MiB
         Load Address: 60008000
         Entry Point:  60008000
         Verifying Checksum ... OK
         Loading Kernel Image ... OK
      OK
      
      Starting kernel ...
      
      Enabling DEBUG_LL does not seem to change the situation, however this
      patch by itself fixes this issue and re-enables normal boot.
      
      This issue happens because the IRQ numbers of the GIC are now virtual,
      and no longer match the hardcoded hardware IRQ numbers in the platform
      board code.
      
      To fix this, instantiate the GIC from platform board code when compiling
      a legacy kernel, like is done for the sh73a0, r8a7740 and r8a7778 legacy code.
      
      Follows same style as the r8a7740 legacy GIC fix by Geert Uytterhoeven,
      thanks to him for the initial work.
      Signed-off-by: NMagnus Damm <damm+renesas@opensource.se>
      Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      f469cde2
    • M
      ARM: shmobile: r8a7778: Instantiate GIC from C board code in legacy builds · 1fbbc3f0
      Magnus Damm 提交于
      As of commit 9a1091ef ("irqchip: gic: Support hierarchy irq
      domain."), Bock-W legacy hangs during boot with:
      
      Unable to handle kernel paging request at virtual address cf86a128
      pgd = c0004000
      [cf86a128] *pgd=6f80041e(bad)
      Internal error: Oops: 8000000d [#1] SMP ARM
      CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.19.0-rc4 #1
      Hardware name: bockw
      task: cf823b40 ti: cf824000 task.ti: cf824000
      PC is at 0xcf86a128
      LR is at request_threaded_irq+0xbc/0x124
      
      This happens because the IRQ numbers of the GIC are now virtual, and no
      longer match the hardcoded hardware IRQ numbers in the platform board
      code.
      
      To fix this, instantiate the GIC from platform board code when compiling
      a legacy kernel, like is done for the sh73a0 and r8a7740 legacy code.
      
      Follows same style as the r8a7740 legacy GIC fix by Geert Uytterhoeven,
      thanks to him for the initial work.
      Signed-off-by: NMagnus Damm <damm+renesas@opensource.se>
      Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      1fbbc3f0
  12. 16 1月, 2015 3 次提交
  13. 15 1月, 2015 1 次提交
    • G
      ARM: shmobile: R-Mobile: Add DT support for PM domains · 2173fc7c
      Geert Uytterhoeven 提交于
      Populate the PM domains from DT, and provide support to hook up devices
      to their respective PM domain.
      
      The always-on power area (e.g. C5 on r8a7740) is created as a PM domain
      without software control, to allow Run-Time management of module clocks
      for hardware blocks inside this area.
      
      Special cases like PM domains containing CPUs, the console device, or
      Coresight-ETM, are handled by scanning the DT topology.
      
      As long as the ARM debug/perf code doesn't use resource management with
      runtime PM support, the power area containing Coresight-ETM (e.g. D4 on
      r8a7740) must be kept powered to avoid a crash during resume from s2ram
      (dbg_cpu_pm_notify() calls reset_ctrl_regs() unconditionally, causing an
      undefined instruction oops).
      
      Initialization is done from core_initcall(), as the
      "renesas,intc-irqpin" driver uses postcore_initcall().
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      2173fc7c
  14. 13 1月, 2015 2 次提交
  15. 08 1月, 2015 1 次提交
  16. 21 12月, 2014 8 次提交
  17. 19 12月, 2014 1 次提交
  18. 04 12月, 2014 2 次提交
  19. 02 12月, 2014 2 次提交
  20. 17 11月, 2014 1 次提交