- 27 3月, 2015 2 次提交
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由 Lars-Peter Clausen 提交于
When operating in left-justfied mode both the frame-clock and the bit-clock need to be inverted to be standards compliant. This means that the exta clock inversion setting in the armadillo800eva machine driver for CPU component should now be removed. Signed-off-by: NLars-Peter Clausen <lars@metafoo.de> Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Lars-Peter Clausen 提交于
The DAI link format should be specified for the whole link rather than just one component on the link. So move the format specification for the HDMI audio link from the CPU component to the link itself. Since the sh-mobile-hdmi DAI driver doesn't implement the set_fmt() callback in this case there is no functional difference between only specifying the the format for the CPU side or for the whole link, but the later it will allow us to remove support for just specifying the format for one component. Signed-off-by: NLars-Peter Clausen <lars@metafoo.de> Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 19 3月, 2015 1 次提交
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由 Daniel Lezcano 提交于
The default idle driver uses one state with the WFI instruction. The default idle routine invokes WFI when no cpuidle driver is present. The default cpuidle driver is pointless and does not give more than the default idle routine and moreover it pulls all the mathematics tied with the cpuidle governor for nothing, hence consuming more energy. Remove the default driver, the related code and register the driver directly. [compiled only - no board - no test] Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 17 3月, 2015 3 次提交
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由 Gaku Inami 提交于
The pm code for R-Car Gen2 is scatterd in each SoC. These files (pm-r8a7790.c/pm-r8a7791.c) have some overlap code. This change consolidate the pm code for R-Car Gen2 into one. Signed-off-by: NGaku Inami <gaku.inami.xw@bp.renesas.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
Set the SYSCIER as per the values indicated in the documentation. The value previously used appears to been copied from the r8a7779 implementation but on closer inspection is not correct for the r8a7791. Fixes: 5f6108bb ("ARM: shmobile: r8a7791 SYSC setup code") Reported-by: NGeert Uytterhoeven <geert@linux-m68k.org> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
Set the SYSCIER as per the values indicated in the documentation. The value previously used appears to been copied from the r8a7779 implementation but on closer inspection is not correct for the r8a7790. Fixes: a48f1655 ("ARM: shmobile: r8a7790 SYSC setup code") Reported-by: NGeert Uytterhoeven <geert@linux-m68k.org> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 15 3月, 2015 1 次提交
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由 Marc Zyngier 提交于
shmobile only uses gic_arch_extn.irq_set_wake to prevent the GIC from returning -ENXIO when receiving a wake-up configuration request. It is a lot simpler to tell the irq layer that we don't need any configuration by using the IRQCHIP_SKIP_SET_WAKE, thanks to the new gic_set_irqchip_flags function. Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088737-15817-3-git-send-email-marc.zyngier@arm.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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- 12 3月, 2015 2 次提交
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由 Geert Uytterhoeven 提交于
Remove the restart handling hack from the r8a7740 generic multiplatform case. Restart on DT-based r8a7740 platforms is now handled through the R-Mobile reset driver. This reverts commit 1174c712 ("ARM: shmobile: r8a7740: Add restart callback"). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Since commit e0426818 ("ARM: shmobile: r8a7790: Remove legacy code"), all R-Car Gen2 SoCs are supported by multiplatform kernels only. As CONFIG_COMMON_CLK is always set for multiplatform kernels, we can remove related #ifdefs in code specific to R-Car Gen2 SoCs. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 11 3月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
The r8a7790/lager and r8a7791/koelsch development boards have da9063 and da9210 regulators. Both regulators have their interrupt request lines tied to the same interrupt pin (IRQ2) on the SoC. After cold boot or da9063-induced restart, both the da9063 and da9210 seem to assert their interrupt request lines. Hence as soon as one driver requests this irq, it gets stuck in an interrupt storm, as it only manages to deassert its own interrupt request line, and the other driver hasn't installed an interrupt handler yet. To handle this, install a quirk that masks the interrupts in both the da9063 and da9210. This quirk has to run after the i2c master driver has been initialized, but before the i2c slave drivers are initialized. As it depends on i2c, select I2C if one of the affected platforms is enabled in the kernel config. On koelsch, the following happens: - Cold boot or reboot using the da9063 restart handler: IRQ2 is asserted, installing da9063/da9210 regulator quirk ... i2c i2c-6: regulator_quirk_notify: 1, IRQC_MONITOR = 0x3fb i2c 6-0058: regulator_quirk_notify: 1, IRQC_MONITOR = 0x3fb i2c 6-0058: Detected da9063 i2c 6-0058: Masking da9063 interrupt sources i2c 6-0068: regulator_quirk_notify: 1, IRQC_MONITOR = 0x3fb i2c 6-0068: Detected da9210 i2c 6-0068: Masking da9210 interrupt sources i2c 6-0068: IRQ2 is not asserted, removing quirk - Warm boot (reset button): rcar_gen2_regulator_quirk: IRQ2 is not asserted, not installing quirk Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Tested-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NMark Brown <broonie@kernel.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 24 2月, 2015 3 次提交
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由 Magnus Damm 提交于
Allow R-Car Gen2 platforms to boot with CMA enabled and HIGHMEM disabled. This patch adds code to check if the R-Car Gen2 specific memory reservation window is included in the kernel memory range or not. When HIGHMEM is disabled the R-Car Gen2 reservation area is outside the kernel memory range and in such case the memory reservation is simply skipped over. Without this patch the kernel boot hangs when CMA is enabled and HIGHMEM is disabled on the r8a7791 Koelsch hardware platform: WARNING: CPU: 1 PID: 1 at mm/cma.c:113 cma_init_reserved_areas+0x88/0x1d4() ... WARNING: CPU: 1 PID: 1 at mm/cma.c:121 cma_init_reserved_areas+0xf8/0x1d4() ... Unable to handle kernel NULL pointer dereference at virtual address 00000160 pgd = c0003000 [00000160] *pgd=80000040004003, *pmd=00000000 Internal error: Oops: 206 [#1] SMP ARM Modules linked in: CPU: 1 PID: 1 Comm: swapper/0 Tainted: G W 3.19.0-rc4-koelsch-01450-g7f9b6075ce12c3ea-dirty #735 Hardware name: Generic R8A7791 (Flattened Device Tree) task: edc553c0 ti: edc56000 task.ti: edc56000 PC is at set_pfnblock_flags_mask+0x54/0xa0 LR is at 0x440 In the current shmobile_defconfig HIGHMEM is enabled while CMA is disabled, so to trigger this the kernel configuration for both CMA and HIGHMEM needs to be adjusted. Signed-off-by: NMagnus Damm <damm+renesas@opensource.se> Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Wolfram Sang 提交于
Documentation says the last register is at 0x184 (CAxCPUCMCR), so use proper length. Current APMU code accesses CAxCPUnCR which is currently outside of the remapped area. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Wolfram Sang 提交于
Documentation says the last register is at 0x184 (CAxCPUCMCR), so use proper length. Current APMU code accesses CAxCPUnCR which is currently outside of the remapped area. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 19 2月, 2015 1 次提交
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由 Uwe Kleine-König 提交于
The definition static const char *axxia_dt_match[] __initconst = { ... defines a changable array of constant strings. That is you must not do: *axxia_dt_match[0] = 'k'; but axxia_dt_match[0] = "different string"; is fine. So the annotation __initconst is wrong and yields a compiler error when other really const variables are added with __initconst. As the struct machine_desc member dt_compat is declared as const char *const *dt_compat; making the arrays const is the better alternative over changing all annotations to __initdata. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 06 2月, 2015 1 次提交
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由 Mark Rutland 提交于
Now that we can specify which PMU variant we're likely to deal with, do so in the shmobile board code. This will allow us to split the ARMv6, ARMv7, and XScale PMU drivers Signed-off-by: NMark Rutland <mark.rutland@arm.com> Tested-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Olof Johansson <olof@lixom.net> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 29 1月, 2015 2 次提交
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由 Magnus Damm 提交于
As of commit 9a1091ef ("irqchip: gic: Support hierarchy irq domain."), the Lager legacy board support is known to be broken. The IRQ numbers of the GIC are now virtual, and no longer match the hardcoded hardware IRQ numbers in the legacy platform board code. To fix this issue specific to non-multiplatform r8a7790 and Lager: 1) Instantiate the GIC from platform board code and also 2) Skip over the DT arch timer as well as 3) Force delay setup based on DT CPU frequency With these 3 fixes in place interrupts on Lager are now unbroken. Partially based on legacy GIC fix by Geert Uytterhoeven, thanks to him for the initial work. Signed-off-by: NMagnus Damm <damm+renesas@opensource.se> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
As of commit 9a1091ef ("irqchip: gic: Support hierarchy irq domain."), the APE6EVM legacy board support is known to be broken. The IRQ numbers of the GIC are now virtual, and no longer match the hardcoded hardware IRQ numbers in the legacy platform board code. To fix this issue specific to non-muliplatform r8a73a4 and APE6EVM: 1) Instantiate the GIC from platform board code and also 2) Skip over the DT arch timer as well as 3) Force delay setup based on DT CPU frequency With these 3 fixes in place interrupts on APE6EVM are now unbroken. Partially based on legacy GIC fix by Geert Uytterhoeven, thanks to him for the initial work. Signed-off-by: NMagnus Damm <damm+renesas@opensource.se> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 17 1月, 2015 2 次提交
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由 Magnus Damm 提交于
As of commit 9a1091ef ("irqchip: gic: Support hierarchy irq domain."), Marzen legacy hangs during boot with: Image Name: 'Linux-3.19.0-rc4' Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3445880 Bytes = 3.3 MiB Load Address: 60008000 Entry Point: 60008000 Verifying Checksum ... OK Loading Kernel Image ... OK OK Starting kernel ... Enabling DEBUG_LL does not seem to change the situation, however this patch by itself fixes this issue and re-enables normal boot. This issue happens because the IRQ numbers of the GIC are now virtual, and no longer match the hardcoded hardware IRQ numbers in the platform board code. To fix this, instantiate the GIC from platform board code when compiling a legacy kernel, like is done for the sh73a0, r8a7740 and r8a7778 legacy code. Follows same style as the r8a7740 legacy GIC fix by Geert Uytterhoeven, thanks to him for the initial work. Signed-off-by: NMagnus Damm <damm+renesas@opensource.se> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
As of commit 9a1091ef ("irqchip: gic: Support hierarchy irq domain."), Bock-W legacy hangs during boot with: Unable to handle kernel paging request at virtual address cf86a128 pgd = c0004000 [cf86a128] *pgd=6f80041e(bad) Internal error: Oops: 8000000d [#1] SMP ARM CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.19.0-rc4 #1 Hardware name: bockw task: cf823b40 ti: cf824000 task.ti: cf824000 PC is at 0xcf86a128 LR is at request_threaded_irq+0xbc/0x124 This happens because the IRQ numbers of the GIC are now virtual, and no longer match the hardcoded hardware IRQ numbers in the platform board code. To fix this, instantiate the GIC from platform board code when compiling a legacy kernel, like is done for the sh73a0 and r8a7740 legacy code. Follows same style as the r8a7740 legacy GIC fix by Geert Uytterhoeven, thanks to him for the initial work. Signed-off-by: NMagnus Damm <damm+renesas@opensource.se> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 16 1月, 2015 3 次提交
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由 Geert Uytterhoeven 提交于
Add a special case for PM domains containing a memory-controller. Such a PM domain must not be turned off if memory is in use. On sh73a0 PM domains A4BC0 and A4BC1 each contain an SDRAM Bus State Controller (SBSC). On r8a73a4 PM domain A3BC contains two DDR Bus Controllers (DBSC). In both cases, there are no other devices in these PM domains, so they were eligible for power down, crashing the system. On r8a7740 the DDR3 Bus State Controller (DBSC3) is located in A4S, whose child domain A3SM contains the CPU core. Hence A4S is never turned off, and no crash happened. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Make adding special PM domains to an array, and looking them up later, more generic, so it can be used for all special hardware blocks. The type of PM domain is also stored, so rmobile_setup_pm_domain() can use a switch() statement instead of a chain of if/else statements. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Consolidate the identical rmobile_pd_suspend_*() routines that just return -EBUSY to prevent a PM domain from being powered down into a single rmobile_pd_suspend_busy(). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 15 1月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
Populate the PM domains from DT, and provide support to hook up devices to their respective PM domain. The always-on power area (e.g. C5 on r8a7740) is created as a PM domain without software control, to allow Run-Time management of module clocks for hardware blocks inside this area. Special cases like PM domains containing CPUs, the console device, or Coresight-ETM, are handled by scanning the DT topology. As long as the ARM debug/perf code doesn't use resource management with runtime PM support, the power area containing Coresight-ETM (e.g. D4 on r8a7740) must be kept powered to avoid a crash during resume from s2ram (dbg_cpu_pm_notify() calls reset_ctrl_regs() unconditionally, causing an undefined instruction oops). Initialization is done from core_initcall(), as the "renesas,intc-irqpin" driver uses postcore_initcall(). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 13 1月, 2015 2 次提交
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由 Geert Uytterhoeven 提交于
Replace the hardcoded addresses for accessing the SYSC PM domain registers by register offsets, relative to the SYSC base address stored in struct rmobile_pm_domain. In the future, the SYSC base address will come from DT. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Use the just introduced genpd attach/detach callbacks to register the devices' module clocks, instead of doing it directly, to make it DT-proof. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 08 1月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
The sh73a0 INTC can't mask interrupts properly most likely due to a hardware bug. Set the .control_parent flag to delegate masking to the parent interrupt controller, like was already done for irqpin1. Without this, accessing the three-axis digital accelerometer ADXL345 on kzm9g through /dev/input/event1 causes an interrupt storm, which requires a power-cycle to recover from. This was inspired by a patch for arch/arm/boot/dts/sh73a0.dtsi from Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Fixes: 341eb546 ("ARM: shmobile: INTC External IRQ pin driver on sh73a0") Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 21 12月, 2014 8 次提交
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由 Ulrich Hecht 提交于
Enable r8a73a4 Multiplatform support for the generic r8a73a4 machine vector. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: NMagnus Damm <damm+renesas@opensource.se> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Skip the TWD setup in C for r8a7779 Multiplatform. We should use DTS for the TWD device anyway. Signed-off-by: NMagnus Damm <damm+renesas@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Fix "is_e2" warning introduced by: 9ce3fa68 ARM: shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794 Only triggers on kernel configurations that have ARCH_ARM_TIMER=n. Signed-off-by: NMagnus Damm <damm+renesas@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
This clock drives the irqpin controller modules. Before, it was assumed enabled by the bootloader or reset state. By making it available to the driver, we make sure it gets enabled when needed, and allow it to be managed by system or runtime PM. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Ulrich Hecht 提交于
Disables sh73a0_clock_init() if CCF is enabled. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
All r8a7790 boards are now used with multiplatform kernels only. We can remove all the unused r8a7790 legacy device and clock registration code. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Lager legacy support level is same as the DT case so remove the legacy code and force people to move over to using Multiplatform and DT. Signed-off-by: NMagnus Damm <damm+renesas@opensource.se> [Remove lager_defconfig and don't build the dtb for legacy kernels] Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Remove redundant C board code for Lager Multiplatform, everything is supported via DT these days anyway so it is fine to rely on the MACHINE_START in setup-r8a7790.c. Signed-off-by: NMagnus Damm <damm+renesas@opensource.se> [Remove CONFIG_MACH_LAGER from shmobile_defconfig] Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 19 12月, 2014 1 次提交
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由 Geert Uytterhoeven 提交于
As of commit 9a1091ef ("irqchip: gic: Support hierarchy irq domain."), armadillo-legacy hangs during boot with: sh-tmu.0: ch0: used for clock events sh-tmu.0: ch0: used for periodic clock events sh-tmu.0: ch0: failed to request irq 230 sh-tmu.0: ch1: used as clock source sh-cmt-48.1: ch0: failed to request irq 90 sh-cmt-48.1: ch0: registration failed earlytimer: unable to probe sh-cmt-48 early. Calibrating delay loop... This happens because the IRQ numbers of the GIC are now virtual, and no longer match the hardcoded hardware IRQ numbers in the platform board code. To fix this, instantiate the GIC from platform board code when compiling a legacy kernel, like is done on sh73a0 for kzm9g-legacy. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 04 12月, 2014 2 次提交
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由 Ulf Hansson 提交于
Instead of using the dev_ops ->stop|start() callbacks for genpd, let's convert to use genpd's flag field and set it to GENPD_FLAG_PM_CLK. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Ulf Hansson 提交于
Instead of using the dev_ops ->stop|start() callbacks for genpd, let's convert to use genpd's flag field and set it to GENPD_FLAG_PM_CLK. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 02 12月, 2014 2 次提交
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由 Laurent Pinchart 提交于
Platform data support has been removed from the DU driver, drop DU support from the legacy Marzen board file. The multiplatform DT-based Marzen support should be used instead. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Laurent Pinchart 提交于
Platform data support has been removed from the DU driver, drop DU support from the legacy Lager board file. The multiplatform DT-based Lager support should be used instead. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 17 11月, 2014 1 次提交
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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