1. 13 11月, 2014 5 次提交
    • N
      arm64: ARCH_PFN_OFFSET should be unsigned long · 5fd6690c
      Neil Zhang 提交于
      pfns are unsigned long, but PHYS_PFN_OFFSET is phys_addr_t. This leads
      to page_to_pfn() returning phys_addr_t which cause type mismatches in
      some print statements.
      Signed-off-by: NNeil Zhang <zhangwm@marvell.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      5fd6690c
    • W
      Correct the race condition in aarch64_insn_patch_text_sync() · 899d5933
      William Cohen 提交于
      When experimenting with patches to provide kprobes support for aarch64
      smp machines would hang when inserting breakpoints into kernel code.
      The hangs were caused by a race condition in the code called by
      aarch64_insn_patch_text_sync().  The first processor in the
      aarch64_insn_patch_text_cb() function would patch the code while other
      processors were still entering the function and incrementing the
      cpu_count field.  This resulted in some processors never observing the
      exit condition and exiting the function.  Thus, processors in the
      system hung.
      
      The first processor to enter the patching function performs the
      patching and signals that the patching is complete with an increment
      of the cpu_count field. When all the processors have incremented the
      cpu_count field the cpu_count will be num_cpus_online()+1 and they
      will return to normal execution.
      
      Fixes: ae164807 arm64: introduce interfaces to hotpatch kernel and module code
      Signed-off-by: NWilliam Cohen <wcohen@redhat.com>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      899d5933
    • K
      arm64: __clear_user: handle exceptions on strb · 97fc1543
      Kyle McMartin 提交于
      ARM64 currently doesn't fix up faults on the single-byte (strb) case of
      __clear_user... which means that we can cause a nasty kernel panic as an
      ordinary user with any multiple PAGE_SIZE+1 read from /dev/zero.
      i.e.: dd if=/dev/zero of=foo ibs=1 count=1 (or ibs=65537, etc.)
      
      This is a pretty obscure bug in the general case since we'll only
      __do_kernel_fault (since there's no extable entry for pc) if the
      mmap_sem is contended. However, with CONFIG_DEBUG_VM enabled, we'll
      always fault.
      
      if (!down_read_trylock(&mm->mmap_sem)) {
      	if (!user_mode(regs) && !search_exception_tables(regs->pc))
      		goto no_context;
      retry:
      	down_read(&mm->mmap_sem);
      } else {
      	/*
      	 * The above down_read_trylock() might have succeeded in
      	 * which
      	 * case, we'll have missed the might_sleep() from
      	 * down_read().
      	 */
      	might_sleep();
      	if (!user_mode(regs) && !search_exception_tables(regs->pc))
      		goto no_context;
      }
      
      Fix that by adding an extable entry for the strb instruction, since it
      touches user memory, similar to the other stores in __clear_user.
      Signed-off-by: NKyle McMartin <kyle@redhat.com>
      Reported-by: NMiloš Prchlík <mprchlik@redhat.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      97fc1543
    • M
      arm64: Fix data type for physical address · 287e8c6a
      Min-Hua Chen 提交于
      Use phys_addr_t for physical address in alloc_init_pud. Although
      phys_addr_t and unsigned long are 64 bit in arm64, it is better
      to use phys_addr_t to describe physical addresses.
      Signed-off-by: NMin-Hua Chen <orca.chen@gmail.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      287e8c6a
    • M
      arm64: efi: Fix stub cache maintenance · 9b0b2658
      Mark Rutland 提交于
      While efi-entry.S mentions that efi_entry() will have relocated the
      kernel image, it actually means that efi_entry will have placed a copy
      of the kernel in the appropriate location, and until this is branched to
      at the end of efi_entry.S, all instructions are executed from the
      original image.
      
      Thus while the flush in efi_entry.S does ensure that the copy is visible
      to noncacheable accesses, it does not guarantee that this is true for
      the image instructions are being executed from. This could have
      disasterous effects when the MMU and caches are disabled if the image
      has not been naturally evicted to the PoC.
      
      Additionally, due to a missing dsb following the ic ialluis, the new
      kernel image is not necessarily clean in the I-cache when it is branched
      to, with similar potentially disasterous effects.
      
      This patch adds additional flushing to ensure that the currently
      executing stub text is flushed to the PoC and is thus visible to
      noncacheable accesses. As it is placed after the instructions cache
      maintenance for the new image and __flush_dcache_area already contains a
      dsb, we do not need to add a separate barrier to ensure completion of
      the icache maintenance.
      
      Comments are updated to clarify the situation with regard to the two
      images and the maintenance required for both.
      
      Fixes: 3c7f2550Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      Acked-by: NJoel Schopp <joel.schopp@amd.com>
      Reviewed-by: NRoy Franz <roy.franz@linaro.org>
      Tested-by: NTom Lendacky <thomas.lendacky@amd.com>
      Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
      Cc: Ian Campbell <ijc@hellion.org.uk>
      Cc: Leif Lindholm <leif.lindholm@linaro.org>
      Cc: Mark Salter <msalter@redhat.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      9b0b2658
  2. 06 11月, 2014 2 次提交
  3. 05 11月, 2014 1 次提交
    • I
      dtb: xgene: fix: Backward compatibility with older firmware · 09c9e059
      Iyappan Subramanian 提交于
      The following kernel crash was reported when using older firmware (<= 1.13.28).
      
      [    0.980000] libphy: APM X-Gene MDIO bus: probed
      [    1.130000] Unhandled fault: synchronous external abort (0x96000010) at 0xffffff800009a17c
      [    1.140000] Internal error: : 96000010 [#1] SMP
      [    1.140000] Modules linked in:
      [    1.140000] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.17.0+ #21
      [    1.140000] task: ffffffc3f0110000 ti: ffffffc3f0064000 task.ti: ffffffc3f0064000
      [    1.140000] PC is at ioread32+0x58/0x68
      [    1.140000] LR is at xgene_enet_setup_ring+0x18c/0x1cc
      [    1.140000] pc : [<ffffffc0003cec68>] lr : [<ffffffc00053dad8>] pstate: a0000045
      [    1.140000] sp : ffffffc3f0067b20
      [    1.140000] x29: ffffffc3f0067b20 x28: ffffffc000aa8ea0
      [    1.140000] x27: ffffffc000bb2000 x26: ffffffc000a64270
      [    1.140000] x25: ffffffc000b05ad8 x24: ffffffc0ff99ba58
      [    1.140000] x23: 0000000000004000 x22: 0000000000004000
      [    1.140000] x21: 0000000000000200 x20: 0000000000200000
      [    1.140000] x19: ffffffc0ff99ba18 x18: ffffffc0007a6000
      [    1.140000] x17: 0000000000000007 x16: 000000000000000e
      [    1.140000] x15: 0000000000000001 x14: 0000000000000000
      [    1.140000] x13: ffffffbeedb71320 x12: 00000000ffffff80
      [    1.140000] x11: 0000000000000002 x10: 0000000000000000
      [    1.140000] x9 : 0000000000000000 x8 : ffffffc3eb2a4000
      [    1.140000] x7 : 0000000000000000 x6 : 0000000000000000
      [    1.140000] x5 : 0000000001080000 x4 : 000000007d654010
      [    1.140000] x3 : ffffffffffffffff x2 : 000000000003ffff
      [    1.140000] x1 : ffffff800009a17c x0 : ffffff800009a17c
      
      The issue was that the older firmware does not support 10GbE and
      SGMII based 1GBE interfaces.
      
      This patch changes the address length of the reg property of sgmii0 and xgmii
      nodes and serves as preparatory patch for the fix.
      Signed-off-by: NIyappan Subramanian <isubramanian@apm.com>
      Signed-off-by: NKeyur Chudgar <kchudgar@apm.com>
      Reported-by: NDann Frazier <dann.frazier@canonical.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      09c9e059
  4. 31 10月, 2014 1 次提交
  5. 25 10月, 2014 1 次提交
  6. 24 10月, 2014 1 次提交
  7. 22 10月, 2014 2 次提交
  8. 21 10月, 2014 8 次提交
  9. 16 10月, 2014 1 次提交
  10. 15 10月, 2014 1 次提交
  11. 14 10月, 2014 1 次提交
    • C
      arm64: KVM: Implement 48 VA support for KVM EL2 and Stage-2 · 38f791a4
      Christoffer Dall 提交于
      This patch adds the necessary support for all host kernel PGSIZE and
      VA_SPACE configuration options for both EL2 and the Stage-2 page tables.
      
      However, for 40bit and 42bit PARange systems, the architecture mandates
      that VTCR_EL2.SL0 is maximum 1, resulting in fewer levels of stage-2
      pagge tables than levels of host kernel page tables.  At the same time,
      systems with a PARange > 42bit, we limit the IPA range by always setting
      VTCR_EL2.T0SZ to 24.
      
      To solve the situation with different levels of page tables for Stage-2
      translation than the host kernel page tables, we allocate a dummy PGD
      with pointers to our actual inital level Stage-2 page table, in order
      for us to reuse the kernel pgtable manipulation primitives.  Reproducing
      all these in KVM does not look pretty and unnecessarily complicates the
      32-bit side.
      
      Systems with a PARange < 40bits are not yet supported.
      
       [ I have reworked this patch from its original form submitted by
         Jungseok to take the architecture constraints into consideration.
         There were too many changes from the original patch for me to
         preserve the authorship.  Thanks to Catalin Marinas for his help in
         figuring out a good solution to this challenge.  I have also fixed
         various bugs and missing error code handling from the original
         patch. - Christoffer ]
      Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com>
      Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NJungseok Lee <jungseoklee85@gmail.com>
      Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
      38f791a4
  12. 11 10月, 2014 1 次提交
  13. 10 10月, 2014 5 次提交
  14. 06 10月, 2014 1 次提交
  15. 04 10月, 2014 3 次提交
    • L
      arm64: efi: Format EFI memory type & attrs with efi_md_typeattr_format() · 65ba758f
      Laszlo Ersek 提交于
      An example log excerpt demonstrating the change:
      
      Before the patch:
      
      > Processing EFI memory map:
      >   0x000040000000-0x000040000fff [Loader Data]
      >   0x000040001000-0x00004007ffff [Conventional Memory]
      >   0x000040080000-0x00004072afff [Loader Data]
      >   0x00004072b000-0x00005fdfffff [Conventional Memory]
      >   0x00005fe00000-0x00005fe0ffff [Loader Data]
      >   0x00005fe10000-0x0000964e8fff [Conventional Memory]
      >   0x0000964e9000-0x0000964e9fff [Loader Data]
      >   0x0000964ea000-0x000096c52fff [Loader Code]
      >   0x000096c53000-0x00009709dfff [Boot Code]*
      >   0x00009709e000-0x0000970b3fff [Runtime Code]*
      >   0x0000970b4000-0x0000970f4fff [Runtime Data]*
      >   0x0000970f5000-0x000097117fff [Runtime Code]*
      >   0x000097118000-0x000097199fff [Runtime Data]*
      >   0x00009719a000-0x0000971dffff [Runtime Code]*
      >   0x0000971e0000-0x0000997f8fff [Conventional Memory]
      >   0x0000997f9000-0x0000998f1fff [Boot Data]*
      >   0x0000998f2000-0x0000999eafff [Conventional Memory]
      >   0x0000999eb000-0x00009af09fff [Boot Data]*
      >   0x00009af0a000-0x00009af21fff [Conventional Memory]
      >   0x00009af22000-0x00009af46fff [Boot Data]*
      >   0x00009af47000-0x00009af5bfff [Conventional Memory]
      >   0x00009af5c000-0x00009afe1fff [Boot Data]*
      >   0x00009afe2000-0x00009afe2fff [Conventional Memory]
      >   0x00009afe3000-0x00009c01ffff [Boot Data]*
      >   0x00009c020000-0x00009efbffff [Conventional Memory]
      >   0x00009efc0000-0x00009f14efff [Boot Code]*
      >   0x00009f14f000-0x00009f162fff [Runtime Code]*
      >   0x00009f163000-0x00009f194fff [Runtime Data]*
      >   0x00009f195000-0x00009f197fff [Boot Data]*
      >   0x00009f198000-0x00009f198fff [Runtime Data]*
      >   0x00009f199000-0x00009f1acfff [Conventional Memory]
      >   0x00009f1ad000-0x00009f1affff [Boot Data]*
      >   0x00009f1b0000-0x00009f1b0fff [Runtime Data]*
      >   0x00009f1b1000-0x00009fffffff [Boot Data]*
      >   0x000004000000-0x000007ffffff [Memory Mapped I/O]
      >   0x000009010000-0x000009010fff [Memory Mapped I/O]
      
      After the patch:
      
      > Processing EFI memory map:
      >   0x000040000000-0x000040000fff [Loader Data        |   |  |  |  |   |WB|WT|WC|UC]
      >   0x000040001000-0x00004007ffff [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC]
      >   0x000040080000-0x00004072afff [Loader Data        |   |  |  |  |   |WB|WT|WC|UC]
      >   0x00004072b000-0x00005fdfffff [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC]
      >   0x00005fe00000-0x00005fe0ffff [Loader Data        |   |  |  |  |   |WB|WT|WC|UC]
      >   0x00005fe10000-0x0000964e8fff [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC]
      >   0x0000964e9000-0x0000964e9fff [Loader Data        |   |  |  |  |   |WB|WT|WC|UC]
      >   0x0000964ea000-0x000096c52fff [Loader Code        |   |  |  |  |   |WB|WT|WC|UC]
      >   0x000096c53000-0x00009709dfff [Boot Code          |   |  |  |  |   |WB|WT|WC|UC]*
      >   0x00009709e000-0x0000970b3fff [Runtime Code       |RUN|  |  |  |   |WB|WT|WC|UC]*
      >   0x0000970b4000-0x0000970f4fff [Runtime Data       |RUN|  |  |  |   |WB|WT|WC|UC]*
      >   0x0000970f5000-0x000097117fff [Runtime Code       |RUN|  |  |  |   |WB|WT|WC|UC]*
      >   0x000097118000-0x000097199fff [Runtime Data       |RUN|  |  |  |   |WB|WT|WC|UC]*
      >   0x00009719a000-0x0000971dffff [Runtime Code       |RUN|  |  |  |   |WB|WT|WC|UC]*
      >   0x0000971e0000-0x0000997f8fff [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC]
      >   0x0000997f9000-0x0000998f1fff [Boot Data          |   |  |  |  |   |WB|WT|WC|UC]*
      >   0x0000998f2000-0x0000999eafff [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC]
      >   0x0000999eb000-0x00009af09fff [Boot Data          |   |  |  |  |   |WB|WT|WC|UC]*
      >   0x00009af0a000-0x00009af21fff [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC]
      >   0x00009af22000-0x00009af46fff [Boot Data          |   |  |  |  |   |WB|WT|WC|UC]*
      >   0x00009af47000-0x00009af5bfff [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC]
      >   0x00009af5c000-0x00009afe1fff [Boot Data          |   |  |  |  |   |WB|WT|WC|UC]*
      >   0x00009afe2000-0x00009afe2fff [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC]
      >   0x00009afe3000-0x00009c01ffff [Boot Data          |   |  |  |  |   |WB|WT|WC|UC]*
      >   0x00009c020000-0x00009efbffff [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC]
      >   0x00009efc0000-0x00009f14efff [Boot Code          |   |  |  |  |   |WB|WT|WC|UC]*
      >   0x00009f14f000-0x00009f162fff [Runtime Code       |RUN|  |  |  |   |WB|WT|WC|UC]*
      >   0x00009f163000-0x00009f194fff [Runtime Data       |RUN|  |  |  |   |WB|WT|WC|UC]*
      >   0x00009f195000-0x00009f197fff [Boot Data          |   |  |  |  |   |WB|WT|WC|UC]*
      >   0x00009f198000-0x00009f198fff [Runtime Data       |RUN|  |  |  |   |WB|WT|WC|UC]*
      >   0x00009f199000-0x00009f1acfff [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC]
      >   0x00009f1ad000-0x00009f1affff [Boot Data          |   |  |  |  |   |WB|WT|WC|UC]*
      >   0x00009f1b0000-0x00009f1b0fff [Runtime Data       |RUN|  |  |  |   |WB|WT|WC|UC]*
      >   0x00009f1b1000-0x00009fffffff [Boot Data          |   |  |  |  |   |WB|WT|WC|UC]*
      >   0x000004000000-0x000007ffffff [Memory Mapped I/O  |RUN|  |  |  |   |  |  |  |UC]
      >   0x000009010000-0x000009010fff [Memory Mapped I/O  |RUN|  |  |  |   |  |  |  |UC]
      
      The attribute bitmap is now displayed, in decoded form.
      Signed-off-by: NLaszlo Ersek <lersek@redhat.com>
      Tested-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
      Acked-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
      Signed-off-by: NMatt Fleming <matt.fleming@intel.com>
      65ba758f
    • D
      arm64/efi: Do not enter virtual mode if booting with efi=noruntime or noefi · 6632210f
      Dave Young 提交于
      In case efi runtime disabled via noefi kernel cmdline
      arm64_enter_virtual_mode should error out.
      
      At the same time move early_memunmap(memmap.map, mapsize) to the
      beginning of the function or it will leak early mem.
      Signed-off-by: NDave Young <dyoung@redhat.com>
      Reviewed-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NMatt Fleming <matt.fleming@intel.com>
      6632210f
    • D
      arm64/efi: uefi_init error handling fix · 88f8abd5
      Dave Young 提交于
      There's one early memmap leak in uefi_init error path, fix it and
      slightly tune the error handling code.
      Signed-off-by: NDave Young <dyoung@redhat.com>
      Acked-by: NMark Salter <msalter@redhat.com>
      Reported-by: NWill Deacon <will.deacon@arm.com>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NMatt Fleming <matt.fleming@intel.com>
      88f8abd5
  16. 03 10月, 2014 6 次提交