- 14 5月, 2013 1 次提交
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由 Andrew Lunn 提交于
The patch: 387870f2 mm: dmapool: use provided gfp flags for all dma_alloc_coherent() calls makes these calls on Kirkwood and Orion5x redundant. The drivers are not making atomic requests for coherent memory and hence the default pool size is now sufficient. Jason Cooper added mach-mvebu/ hunk, and corrected minor typos in commit message. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 15 4月, 2013 1 次提交
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由 Thomas Petazzoni 提交于
This commit migrates the mach-kirkwood platforms to use the mvebu-mbus driver and therefore removes the Kirkwood-specific addr-map code. The kirkwood_init_early() function is now responsible for initializing the mvebu-mbus driver by calling mvebu_mbus_init(). The address decoding windows are now registered in the kirkwood_setup_wins() function. It is worth noting that the four PCIe address decoding windows will ultimately no longer have to be registered here: it will be done automatically by the PCIe driver once Kirkwood has been migrated to use the upcoming mvebu PCIe driver. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 01 2月, 2013 1 次提交
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由 Andrew Lunn 提交于
Move the Kirkwood cpuidle driver out of arch/arm/mach-kirkwood and into drivers/cpuidle. Convert the driver into a platform driver. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 25 12月, 2012 1 次提交
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由 Stephen Warren 提交于
Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 22 11月, 2012 1 次提交
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由 Jason Gunthorpe 提交于
mv64xxx_of_config requires that the tclk frequency be found through the clk stuff rather than through device tree, so add another override for the 2nd controller. Signed-off-by: NJason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 20 11月, 2012 1 次提交
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由 Thomas Petazzoni 提交于
Since we got rid of the per-XOR channel 'mv_xor' driver, now the per-XOR engine driver that used to be called 'mv_xor_shared' can simply be named 'mv_xor'. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
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- 19 11月, 2012 2 次提交
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由 Andrew Lunn 提交于
Mostly printk to pr_{err|info} changes and a few strings split over multiple lines are combined. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Andrew Lunn 提交于
Mostly missing statics, but also missing include files and void parameters. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 19 10月, 2012 1 次提交
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由 Jason Gunthorpe 提交于
Move the CACHE_FEROCEON_L2 test to kirkwood_l2_init, since linking fails on the reference to feroceon_l2_init. Signed-off-by: NJason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 22 9月, 2012 3 次提交
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由 Thomas Petazzoni 提交于
The functions for time management now take void __iomem pointers, so we remove the temporary "unsigned long" casts from the mach-*/common.c files. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Tested-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
The registration functions for UARTs now take void __iomem pointers, so we remove the temporary "unsigned long" casts from the mach-*/common.c files. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Tested-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
We now define all virtual base address constants using IOMEM() so that those are naturally typed as void __iomem pointers, and we do the necessary adjustements in the mach-kirkwood code. Note that we introduce a few temporary additional "unsigned long" casts when calling into plat-orion functions. Those are removed by followup patches converting plat-orion functions to void __iomem pointers as well. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Tested-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 19 9月, 2012 1 次提交
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由 Arnd Bergmann 提交于
Platform data for device drivers should be defined in include/linux/platform_data/*.h, not in the architecture and platform specific directories. This moves such data out of the orion include directories Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: NNicolas Pitre <nico@linaro.org> Acked-by: NMauro Carvalho Chehab <mchehab@redhat.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Cc: Bryan Wu <bryan.wu@canonical.com> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: Chris Ball <cjb@laptop.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Alan Stern <stern@rowland.harvard.edu> Cc: Liam Girdwood <lrg@ti.com> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.de>
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- 29 8月, 2012 1 次提交
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由 Marek Szyprowski 提交于
The default 256 KiB coherent pool may be too small for some of the Kirkwood devices, so increase it to make sure that devices will be able to allocate their buffers with GFP_ATOMIC flag. Suggested-by: NJosh Coombs <josh.coombs@gmail.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Acked-by: NJason Cooper <jason@lakedaemon.net>
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- 15 8月, 2012 1 次提交
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由 Arnaud Patard (Rtp) 提交于
The mv643xx ethernet controller limits the packet size for the TX checksum offloading. This patch sets this limits for Kirkwood and Dove which have smaller limits that the default. As a side note, this patch is an updated version of a patch sent some years ago: http://lists.infradead.org/pipermail/linux-arm-kernel/2010-June/017320.html which seems to have been lost. Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net> Cc: <stable@vger.kernel.org>
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- 27 7月, 2012 1 次提交
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由 Andrew Lunn 提交于
The MV64XXX I2C driver needs a clock in order to calculate the baud rate factors. So add an clk to the clk tree. Also add the base DT properties for kirkwood devices. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Conflicts: arch/arm/mach-kirkwood/common.c
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- 26 7月, 2012 1 次提交
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由 Rob Herring 提交于
Move kirkwood PCI to fixed i/o mapping and remove io.h. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Lennert Buytenhek <kernel@wantstofly.org> Acked-by: NNicolas Pitre <nico@linaro.org> Cc: Jason Cooper <jason@lakedaemon.net> Tested-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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- 25 7月, 2012 2 次提交
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由 Simon Baatz 提交于
Commit 98d9986c (ARM: Kirkwood: Replace clock gating) and the fix 5fb2ce (ARM: Kirkwood: clk_register_gate_fn: add fn assignment) introduced a custom variant of clock gating which allows to define a function to be called before gating the clock off. This is used to disable the SATA and PCIe PHYs if the respective clocks are unused after initialization. However, of these two drivers, the SATA driver may be compiled as a module. The driver re-enables the clocks at module init but the PHYs stay disabled. Since the custom clock gating disabled the PHYs when gating the clock off, it should also re-enable them when enabling the clock gate. This is done by adding a second function that may be used to enable the PHYs. Signed-off-by: NSimon Baatz <gmbnomis@gmail.com> Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
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由 Andrew Lunn 提交于
Marvell engineers tell us: It seems that many units use the RUNIT clock. SPI, UART, NAND, TWSI, ... So it's not possible to clock gate it. Currently the SPI, NAND and TWSI driver will clk_prepaure_enable() this clk, but since we have no idea what ... is, and turning this clk off results in a hard lock, unconditionally enable runit. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NSimon Baatz <gmbnomis@gmail.com>
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- 24 6月, 2012 1 次提交
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由 Marc Kleine-Budde 提交于
In commit: 98d9986c ARM: Kirkwood: Replace clock gating the kirkwood clock gating has been reworked. A custom variant of clock gating, that calls a custom function before gating the clock off, has been introduced. However in clk_register_gate_fn() this custom function "fn" is never assigned. This patch adds the missing fn assignment. Cc: stable <stable@vger.kernel.org> Signed-off-by: NMarc Kleine-Budde <mkl@blackshift.org> Tested-by: NAndrew Lunn <andrew@lunn.ch> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 17 6月, 2012 1 次提交
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由 Andrew Lunn 提交于
When the ethernet driver was built as a module, it would lock the machine when loaded. At boot the ethernet clks are unused, so get turned off. Later, when the module is loaded, the probe function would access the hardware before the clock was restarted, and the machine would lock. It has also been determined that when the clk is turned off, the interface forgets its MAC address, which for most systems, is set by the boot loader. When the machine setup file creates a platform device for the interface, prepare and enable the clock for the interface. This will ensure it is not turned off. However, if the setup file only instantiates one platform device, the other will have its clk disabled, thus maybe saving a little power. Report-by: NSimon Baatz <gmbnomis@gmail.com> Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NSimon Baatz <gmbnomis@gmail.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 15 5月, 2012 1 次提交
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由 Jamie Lentin 提交于
Add default configuration for NAND, to be enabled in your board config. Ensure clock gating is set appropriately when the NAND is enabled. Acked-by: NJason Cooper <jason@lakedaemon.net> Signed-off-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 09 5月, 2012 14 次提交
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由 Andrew Lunn 提交于
Add a varient of the basic clk-gate code. This variant calls a function before gating the clock off. This function is used to disable the SATA or PCIe PHY. Now that all the drivers prepare and enable there clk as needed, there is no need for the common code to keep track of which clocks need gating on. Let the common clock framework turn off clocks which are not used. Buy using the added clk varient, when the clk framework turns off SATA or PCIe clocks, we also disabled SATA and PCIe PHYs which were not needed. The function kirkwood_pcie_id() can now be called outside of __init code, so remove this property for it, and functions it calls. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Prepare and enable the clocks when the board indicates the pcie buses will be used. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Some orion platforms can gate the XOR driver clock. If the clock exisits, unable/disable it as appropriate. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Some orion platforms support gating of the clock. If the clock exists enable/disbale it as appropriate. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Some orion devices can gate the SDIO clock. If the clock exists, enable/disable it as appropriate. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Not all orion platforms can gate the clock, but if it does exist, enable/disable it as appropriate. v2: Fix the name of the clkdev entry. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Not all platforms support gating the clock, so it is not an error if the clock does not exist. However, if it does exist, we should enable/disable it as appropriate. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
The Orion kirkwood chips have a gatable clock per SATA channel. Add code to get and enable this clk if it exists. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Let the machine pass to the platform which clock is used by the uart. Enable the clock and use clk_get_rate() to determine its rate. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Remove tclk from platform data. This makes the platform data structure empty, so remove it. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
The t_clk is moved from the shared part of the ethernet driver into the per port section. Each port can have its own gated clock, which it needs to enable/disable, as oppossed to there being one clock shared by all ports. In practice, only kirkwood supports this at the moment. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Remove now redundant tclk from SPI platform data. This makes the platform data empty, so remove it. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Add tclk as a fixed rate clock for all platforms. In addition, on kirkwood, add a gated clock for most of the clocks which can be gated. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> [mturquette@linaro.org: removed redundant CLKDEV_LOOKUP from Kconfig] [mturquette@linaro.org: removed redundant clk.h from mach-dove/common.c] Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 16 3月, 2012 3 次提交
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由 Jason Cooper 提交于
Signed-off-by: NJason Cooper <jason@lakedaemon.net> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Jason Cooper 提交于
We need to absorb kirkwood_init() into kirkwood_dt_init() so that as we convert drivers, we can remove the platform call, eg kirkwood_rtc_init(). This maintains compatibility with non-fdt configurations because they still call kirkwood_init() in common.c. As drivers are converted, we will reinstate the 'static' qualifier in common.c. Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Andrew Lunn 提交于
It is not used anywhere in the sound driver. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 10 2月, 2012 1 次提交
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由 Andrew Lunn 提交于
The patch "ARM: orion: Consolidate USB platform setup code.", commit 4fcd3f37 broke USB on TS-7800 and other orion5x boards, because the wrong type of PHY was being passed to the EHCI driver in the platform data. Orion5x needs EHCI_PHY_ORION and all the others want EHCI_PHY_NA. Allow the mach- code to tell the generic plat-orion code which USB PHY enum to place into the platform data. Version 2: Rebase to v3.3-rc2. Reported-by: NAmbroz Bizjak <ambrop7@gmail.com> Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NAmbroz Bizjak <ambrop7@gmail.com> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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