1. 14 7月, 2012 2 次提交
  2. 13 7月, 2012 1 次提交
  3. 21 6月, 2012 1 次提交
  4. 20 6月, 2012 1 次提交
    • J
      arm/dts: OMAP2: Fix interrupt controller binding · 95dca12d
      Jon Hunter 提交于
      When booting with device-tree on an OMAP2420H4, the kernel is hanging when
      initialising the interrupts and following kernel dumps is seen ...
      
      [    0.000000] ------------[ cut here ]------------
      [    0.000000] WARNING: at arch/arm/mach-omap2/irq.c:271 omap_intc_of_init+0x50/0xb4()
      [    0.000000] unable to get intc registers
      [    0.000000] Modules linked in:
      [    0.000000] [<c001befc>] (unwind_backtrace+0x0/0xf4) from [<c0040c34>] (warn_slowpath_common+0x4c/0x64)
      [    0.000000] [<c0040c34>] (warn_slowpath_common+0x4c/0x64) from [<c0040ce0>] (warn_slowpath_fmt+0x30/0x40)
      [    0.000000] [<c0040ce0>] (warn_slowpath_fmt+0x30/0x40) from [<c066b8a4>] (omap_intc_of_init+0x50/0xb4)
      [    0.000000] [<c066b8a4>] (omap_intc_of_init+0x50/0xb4) from [<c0688b70>] (of_irq_init+0x144/0x288)
      [    0.000000] [<c0688b70>] (of_irq_init+0x144/0x288) from [<c0663294>] (init_IRQ+0x14/0x1c)
      [    0.000000] [<c0663294>] (init_IRQ+0x14/0x1c) from [<c06607fc>] (start_kernel+0x198/0x304)
      [    0.000000] [<c06607fc>] (start_kernel+0x198/0x304) from [<80008044>] (0x80008044)
      [    0.000000] ---[ end trace 1b75b31a2719ed1c ]---
      [    0.000000] of_irq_init: children remain, but no parents
      
      The OMAP2 interrupt controller binding is missing the number of interrupts and
      interrupt controller register address. Adding these fixes the problem.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      95dca12d
  5. 05 6月, 2012 1 次提交
  6. 01 6月, 2012 6 次提交
  7. 31 5月, 2012 1 次提交
  8. 21 5月, 2012 1 次提交
    • P
      ARM: vexpress: Device Tree updates · e29b65db
      Pawel Moll 提交于
      * Added extra regs for A15 VGIC
      * Added A15 architected timer node
      * Split A5 and A9 TWD nodes into two separate ones for timer
        and watchdog; interrupt definitions fixed on the way
      * Fixed typo in A5 GIC compatible value
      
      All the changes courtesy of Marc Zyngier.
      Signed-off-by: NPawel Moll <pawel.moll@arm.com>
      e29b65db
  9. 20 5月, 2012 1 次提交
  10. 18 5月, 2012 3 次提交
  11. 17 5月, 2012 1 次提交
  12. 16 5月, 2012 1 次提交
  13. 15 5月, 2012 20 次提交