- 22 9月, 2010 8 次提交
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由 Paul Walmsley 提交于
This patch: - adds more documentation to the hwmod code - fixes some documentation typos elsewhere in the file - changes the _sysc_*() function names to appear in (verb, noun) order, to match the rest of the function names. This patch should not result in any functional change. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Benoît Cousson <b-cousson@ti.com>
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由 Benoit Cousson 提交于
Some modules (like GPIO, DSS...) require optionals clock to be enabled in order to complete the sofreset properly. Add a HWMOD_CONTROL_OPT_CLKS_IN_RESET flag to force all optional clocks to be enabled before reset. Disabled them once the reset is done. TODO: For the moment it is very hard to understand from the HW spec, which optional clock is needed and which one is not. So the current approach will enable all the optional clocks. Paul proposed a much finer approach that will allow to tag only the needed clock in the optional clock table. This might be doable as soon as we have a clear understanding of these dependencies. Reported-by: NPartha Basak <p-basak2@ti.com> Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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由 Benoit Cousson 提交于
In OMAP3 a specific SYSSTATUS register was used to get the softreset status. Starting in OMAP4, some IPs does not have SYSSTATUS register and instead use the SYSC softreset bit to provide the status. Other cases might exist: - Some IPs like McBSP does have a softreset control but no reset status. - Some IPs that represent subsystem, like the DSS, can contains a reset status without softreset control. The status is the aggregation of all the sub modules reset status. - Add a new flag (SYSC_HAS_RESET_STATUS) to identify the new programming model and replace the previous SYSS_MISSING, that was used to flag IP with softreset control but without the SYSSTATUS register, with a specific SYSS_HAS_RESET_STATUS flag. - MCSPI and MMC contains both programming models, so the legacy one will be prevented by removing the syss offset field that become useless. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Rajendra Nayak <rnayak@ti.com>
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由 Paul Walmsley 提交于
Expose an hardreset API from hwmod in order to assert / deassert all the individual reset lines that belong to an hwmod. This API is needed by some of the more complicated processor drivers, e.g., DSP/Bridge, Syslink, etc. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
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由 Benoît Cousson 提交于
Most processor IPs does have a hardreset signal controlled by the PRM. This is different of the softreset used for local IP reset from the SYSCONFIG register. The granularity can be much finer than orginal HWMOD, for ex, the IVA hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2... Since this granularity is needed by the driver, we have to ensure than one hwmod exist for each hardreset line. - Store reset lines as hwmod resources that a driver can query by name like an irq or sdma line. - Add two functions for asserting / deasserting reset lines in hwmods processor that require manual reset control. - Add one functions to get the current reset state. - If an hwmod contains only one line, an automatic assertion / de-assertion is done. -> de-assert the hardreset line only during enable from disable transition -> assert the hardreset line only during shutdown Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be kept in INITIALIZED state. They can be properly enabled only if the hardreset line is de-asserted before. For information here is the list of IPs with HW reset control on an OMAP4430 device: RM_DSP_RSTCTRL 1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control' 0,0,'RST1','RW','1','DSP - DSP reset control' RM_IVA_RSTCTRL 2,2,'RST3','RW','1','IVA logic and SL2 reset control' 1,1,'RST2','RW','1','IVA Sequencer2 reset control' 0,0,'RST1','RW','1','IVA sequencer1 reset control' RM_IPU_RSTCTRL 2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.' 1,1,'RST2','RW','1','IPU Cortex M3 CPU2 reset control.' 0,0,'RST1','RW','1','IPU Cortex M3 CPU1 reset control.' PRM_RSTCTRL 1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.' 0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.' RM_CPU0_CPU0_RSTCTRL RM_CPU1_CPU1_RSTCTRL 0,0,'RST','RW','0','Cortex A9 CPU0&1 warm local reset control' Signed-off-by: NBenoit Cousson <b-cousson@ti.com> [paul@pwsan.com: made the hardreset functions static; moved the register twiddling into prm*.c functions in previous patches; changed the function names to conform with hwmod practice] Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Rajendra Nayak <rnayak@ti.com>
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由 Benoit Cousson 提交于
Since OMAP4 is using an absolute address, the current PRM accessors are not useable. OMAP4 adaptation for these API are currently ongoing, so define temp version until the proper ones are defined. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Kevin Hilman 提交于
Currently omap_hwmod_mutex is being used to protect both the list access/modification and concurrent access to hwmod functions. This patch separates these two types of locking. First, omap_hwmod_mutex is used only to protect access and modification of omap_hwmod_list. Also cleaned up some comments referring to this mutex that are no longer needed. Then, for protecting concurrent access to hwmod functions, use a per-hwmod mutex. This protects concurrent access to a single hwmod, but would allow concurrent access to different hwmods. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> [paul@pwsan.com: added structure documentation; changed mutex variable name] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
The dma request line attribute was named dma channel, which leads to confusion with the real dma channel definition. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 16 8月, 2010 1 次提交
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由 Tony Lindgren 提交于
Otherwise we get the following error with omap3_defconfig and CONFIG_SMP: Error: selected processor does not support `sev' Signed-off-by: NTony Lindgren <tony@atomide.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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- 11 8月, 2010 1 次提交
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由 Grazvydas Ignotas 提交于
This will allow us to set up special cards in machine drivers just after they are detected by MMC core. Signed-off-by: NGrazvydas Ignotas <notasas@gmail.com> Cc: Adrian Hunter <adrian.hunter@nokia.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Bob Copeland <me@bobcopeland.com> Cc: Kalle Valo <kvalo@adurom.com> Cc: Madhusudhan Chikkature <madhu.cr@ti.com> Cc: Kishore Kadiyala <kishore.kadiyala@ti.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 05 8月, 2010 1 次提交
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由 Tomi Valkeinen 提交于
Currently the update area on manual update displays is automatically enlargened to fully cover scaled overlays. This patch makes that optional, allowing the panel driver to choose if it's used or not. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@nokia.com>
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- 04 8月, 2010 7 次提交
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由 Felipe Contreras 提交于
Remove kernel.h and module.h since they are not used correctly anyway. Also, remove device.h since it comes along with platform_device.h (always will I guess). Signed-off-by: NFelipe Contreras <felipe.contreras@gmail.com> Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com>
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由 Felipe Contreras 提交于
No need to dynamically register mailboxes one by one. Signed-off-by: NFelipe Contreras <felipe.contreras@gmail.com> Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com>
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由 Felipe Contreras 提交于
Nobody is using them. Signed-off-by: NFelipe Contreras <felipe.contreras@gmail.com> Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com>
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由 Ohad Ben-Cohen 提交于
The underlying buffering implementation of mailbox is converted from block API to kfifo due to the simplicity and speed of kfifo. The default size of the kfifo buffer is set to 256 bytes. This value is configurable at compile time (via CONFIG_OMAP_MBOX_KFIFO_SIZE), and can be changed at runtime (via the mbox_kfifo_size module parameter). Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com> Signed-off-by: NHari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com>
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由 Anand Gadiyar 提交于
Add revision detection for ES1.1 and ES1.2. Set default revision as ES1.2. Add CHIP_GE_OMAP3630ES1_1 to detect revisions 1.1 and later. This is needed for at least one feature that is broken in 3630ES1.0 but exists on older (3430 ES3.1) and newer revisions. Additionally, update some of the CHIP_GE_* macros to use other macros for ease of maintenance. Signed-off-by: NAnand Gadiyar <gadiyar@ti.com> Cc: Nishanth Menon <nm@ti.com> Cc: Manjunatha GK <manjugk@ti.com> [tony@atomide.com: update to remove fallthrough handling] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Mike Rapoport 提交于
Most OMAP3-based boards use exactly the same code for .map_io method in the machine_desc structure. This patch introduces omap3_map_io and updates board-* files to use it as .map_io method. Signed-off-by: NMike Rapoport <mike@compulab.co.il> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sergio Aguirre 提交于
The only difference between them is the physical address of the uart4 port, which is only present in 36xx chips. We don't really need to care about keeping these 2 functions, since the decision to use uart4 is more cleanly done later when we do have access to omap_revision variable. Signed-off-by: NSergio Aguirre <saaguirre@ti.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> [tony@atomide.com: added comment for the uart4_phys] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 03 8月, 2010 3 次提交
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由 Jani Nikula 提交于
Introduce a configuration struct for platform/board specific information of Nokia DSI command mode panels, to be used in addition to struct omap_dss_device (passed via the 'void *data' member). Signed-off-by: NJani Nikula <ext-jani.1.nikula@nokia.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@nokia.com>
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由 Tomi Valkeinen 提交于
Change dsi_vc_dcs_read_2() data parameter to two u8 parameters to make the byte-order clear. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@nokia.com>
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由 Tobias Klauser 提交于
The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: NTobias Klauser <tklauser@distanz.ch> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@nokia.com>
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- 02 8月, 2010 7 次提交
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由 Sukumar Ghorai 提交于
This patch removes direct reference of gpmc address from generic nand platform code. Nand platform code now uses wrapper functions which are implemented in gpmc module. Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sukumar Ghorai 提交于
few functions added in gpmc module and to be used by other drivers like NAND. Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 stanley.miao 提交于
AM3505/3517 doesn't have IO wakeup capability, so we do not need to set the bit OMAP3430_EN_IO and the bit OMAP3430_EN_IO_CHAIN in the register PM_WKEN_WKUP when the system enters suspend state. Tested on AM3517EVM and OMAP3530EVM. Signed-off-by: NStanley.Miao <stanley.miao@windriver.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Samu Onkalo 提交于
Omap DMA controller can prefetch data in advance in case of destination synchronized data transfer. This may increase performance when target HW block doesn't have fifo. Data is waiting for transfer request in DMA fifo instead of read from memory. Signed-off-by: NSamu Onkalo <samu.p.onkalo@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Cory Maccarrone 提交于
This change adds in the necessary clocks and mux pins for UART control on omap7xx devices. I also made a change in the serial code to only try and initialize two UARTs in omap_serial_init, as these devices don't have three. Signed-off-by: NCory Maccarrone <darkstar6262@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Recent DEBUG_LL and uncompress.h changes removed the check_port() as pointed out by Cory Maccarrone <darkstar6262@gmail.com>. This causes some boards to not boot, so add back the MDR1 register check. The MDR1 register tells the mode of omap uart. Based on an earlier patch by Cory Maccarrone <darkstar6262@gmail.com>. Tested-by: NCory Maccarrone <darkstar6262@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Santosh Shilimkar 提交于
This patch adds a secure API to read AuxCoreBoot0 register to check the cpu boot status. It also moves the other smc APIs to common omap44xx-smc.S. This APIs should not be marked as __INIT because we need these to be present for CPU hotplug Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 27 7月, 2010 8 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Paul Walmsley 提交于
Add omap_pm_set_min_clk_rate(). This constraint is meant for use by device drivers to translate a certain device-specific performance constraint (e.g., "minimum polygons per second") to a clock rate for the driver's device, given the driver's intimate knowledge of the device hardware (e.g., device type, device hardware revision, firmware revision, etc.) From a general PM core perspective, clock rate is probably the closest general analog to "performance" that is available, but the exact mapping from a use-case-specific performance constraint to clock rate must be done by the driver. Drivers intended for upstream merging shouldn't hardcode specific clock rates in their code without basing those rates on some performance criteria requested through the driver's subsystem (ideally, from userspace). Imre Deak <imre.deak@nokia.com> described the need and use-case for this constraint, and discussed the implementation - thanks, Imre. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Imre Deak <imre.deak@nokia.com>
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由 Paul Walmsley 提交于
OMAP: PM constraints: add return values; add requesting device param to omap_pm_set_max_dev_wakeup_lat() Add return values to the PM constraint functions. This allows the PM core to provide feedback to the caller if a constraint is not possible. Update the one upstream user of omap_pm_set_max_mpu_wakeup_lat() to add a compatibility wrapper, needed until the driver is changed. Update some of the documentation to conform more closely to kerneldoc style. Add an additional device parameter to omap_pm_set_max_dev_wakeup_lat() to identify the device requesting the constraint. This is so repeated calls to omap_pm_set_max_dev_wakeup_lat() with the same requesting device can override the device's previously-set constraint. Also, it allows the PM core to make a decision as to whether or not the constraint should be satisfied, based on the caller's identity. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Add omap_device_get_mpu_rt_va(). This is intended to be used by device drivers (currently, via a struct platform_data function pointer) to retrieve their corresponding device's virtual base address that the MPU should use to access the device. This is needed because the omap_hwmod code does its own ioremap(), in order to gain access to the module's OCP_SYSCONFIG register. Add omap_hwmod_get_mpu_rt_va(). omap_device_get_mpu_rt_va() calls this function to do the real work. While here, rename struct omap_hwmod._rt_va to struct omap_hwmod._mpu_rt_va, to reinforce that it refers to the MPU's register target virtual address base (as opposed to, for example, the L3's). In the future, this belongs as a function in an omap_bus, so it is not necessary to call this through a platform_data function pointer. The use-case for this function was originally presented by Santosh Shilimkar <santosh.shilimkar@ti.com>. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
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由 Kevin Hilman 提交于
Create simple omap_devices for the main processors and busses. This is required to support the forth-coming device-based OPP approach, where OPPs are managed and tracked at the device level. Also, move these common PM init functions into a common_pm_init call that is called as a device_initcall(). The PM init is done at this level to ensure that the driver core is initialized before initialized. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> [paul@pwsan.com: sparse warnings cleaned up; newly-created functions moved from mach-omap2/io.c to mach-omap2/pm.c; newly-created functions renamed to start with "omap2" rather than "omap"] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
On kernels that don't use the omap_device_enable() calls to enable devices, leave all on-chip devices enabled in hwmod _setup(). Otherwise, accesses to those devices are likely to fail, crashing the system. It's expected that kernels built without CONFIG_PM_RUNTIME will be the primary use-case for this. This functionality is controlled by adding an extra parameter to omap_hwmod_late_init(). This patch is based on the patch "OMAP: hwmod: don't auto-disable hwmod when !CONFIG_PM_RUNTIME" by Kevin Hilman <khilman@deeprootsystems.com>. Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Kevin Hilman 提交于
Some hwmods may need to be idled/enabled in atomic context, so non-locking versions of these functions are required. Most users should not need these and usage of theses should be controlled to understand why access is being done in atomic context. For this reason, the non-locking functions are only exposed at the hwmod level and not at the omap-device level. The use-case that led to the need for the non-locking versions is hwmods that are enabled/idled from within the core idle/suspend path. Since interrupts are already disabled here, the mutex-based locking in hwmod can sleep and will cause potential deadlocks. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Add kerneldoc for struct clk, struct clksel_rate, struct clksel. Move flag macros for struct clk.flags and struct clksel_rate.flags closer to the structures. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 16 7月, 2010 1 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 7月, 2010 3 次提交
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由 Christoph Egger 提交于
OMAP_DSP doesn't exist in Kconfig, therefore removing all references for it from the source code. Signed-off-by: NChristoph Egger <siccegge@cs.fau.de> [tony@atomide.com: updated to apply on top of already queued patches] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
All mach-omap2 omaps should now use the new mux code. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Move omap1 FS USB platform init code into mach-omap1/usb.c Signed-off-by: NTony Lindgren <tony@atomide.com>
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