1. 16 5月, 2019 2 次提交
    • J
      Revert "x86/tsc: Prepare warp test for TSC adjustment" · 727cae00
      Jiufei Xue 提交于
      This reverts commit 76d3b851.
      
      The returned value for check_tsc_warp() is useless now, remove it.
      Signed-off-by: NJiufei Xue <jiufei.xue@linux.alibaba.com>
      Reviewed-by: NJoseph Qi <joseph.qi@linux.alibaba.com>
      727cae00
    • J
      Revert "x86/tsc: Try to adjust TSC if sync test fails" · 1a33c395
      Jiufei Xue 提交于
      This reverts commit cc4db268.
      
      When we do hot-add and enable vCPU, the time inside the VM jumps and
      then VM stucks.
      The dmesg shows like this:
      [   48.402948] CPU2 has been hot-added
      [   48.413774] smpboot: Booting Node 0 Processor 2 APIC 0x2
      [   48.415155] kvm-clock: cpu 2, msr 6b615081, secondary cpu clock
      [   48.453690] TSC ADJUST compensate: CPU2 observed 139318776350 warp.  Adjust: 139318776350
      [  102.060874] clocksource: timekeeping watchdog on CPU0: Marking clocksource 'tsc' as unstable because the skew is too large:
      [  102.060874] clocksource:                       'kvm-clock' wd_now: 1cb1cfc4bf8 wd_last: 1be9588f1fe mask: ffffffffffffffff
      [  102.060874] clocksource:                       'tsc' cs_now: 207d794f7e cs_last: 205a32697a mask: ffffffffffffffff
      [  102.060874] tsc: Marking TSC unstable due to clocksource watchdog
      [  102.070188] KVM setup async PF for cpu 2
      [  102.071461] kvm-stealtime: cpu 2, msr 13ba95000
      [  102.074530] Will online and init hotplugged CPU: 2
      
      This is because the TSC for the newly added VCPU is initialized to 0
      while others are ahead. Guest will do the TSC ADJUST compensate and
      cause the time jumps.
      
      Commit bd8fab39("KVM: x86: fix maintaining of kvm_clock stability
      on guest CPU hotplug") can fix this problem.  However, the host kernel
      version may be older, so do not ajust TSC if sync test fails, just mark
      it unstable.
      Signed-off-by: NJiufei Xue <jiufei.xue@linux.alibaba.com>
      Reviewed-by: NJoseph Qi <joseph.qi@linux.alibaba.com>
      1a33c395
  2. 02 11月, 2017 1 次提交
    • G
      License cleanup: add SPDX GPL-2.0 license identifier to files with no license · b2441318
      Greg Kroah-Hartman 提交于
      Many source files in the tree are missing licensing information, which
      makes it harder for compliance tools to determine the correct license.
      
      By default all files without license information are under the default
      license of the kernel, which is GPL version 2.
      
      Update the files which contain no license information with the 'GPL-2.0'
      SPDX license identifier.  The SPDX identifier is a legally binding
      shorthand, which can be used instead of the full boiler plate text.
      
      This patch is based on work done by Thomas Gleixner and Kate Stewart and
      Philippe Ombredanne.
      
      How this work was done:
      
      Patches were generated and checked against linux-4.14-rc6 for a subset of
      the use cases:
       - file had no licensing information it it.
       - file was a */uapi/* one with no licensing information in it,
       - file was a */uapi/* one with existing licensing information,
      
      Further patches will be generated in subsequent months to fix up cases
      where non-standard license headers were used, and references to license
      had to be inferred by heuristics based on keywords.
      
      The analysis to determine which SPDX License Identifier to be applied to
      a file was done in a spreadsheet of side by side results from of the
      output of two independent scanners (ScanCode & Windriver) producing SPDX
      tag:value files created by Philippe Ombredanne.  Philippe prepared the
      base worksheet, and did an initial spot review of a few 1000 files.
      
      The 4.13 kernel was the starting point of the analysis with 60,537 files
      assessed.  Kate Stewart did a file by file comparison of the scanner
      results in the spreadsheet to determine which SPDX license identifier(s)
      to be applied to the file. She confirmed any determination that was not
      immediately clear with lawyers working with the Linux Foundation.
      
      Criteria used to select files for SPDX license identifier tagging was:
       - Files considered eligible had to be source code files.
       - Make and config files were included as candidates if they contained >5
         lines of source
       - File already had some variant of a license header in it (even if <5
         lines).
      
      All documentation files were explicitly excluded.
      
      The following heuristics were used to determine which SPDX license
      identifiers to apply.
      
       - when both scanners couldn't find any license traces, file was
         considered to have no license information in it, and the top level
         COPYING file license applied.
      
         For non */uapi/* files that summary was:
      
         SPDX license identifier                            # files
         ---------------------------------------------------|-------
         GPL-2.0                                              11139
      
         and resulted in the first patch in this series.
      
         If that file was a */uapi/* path one, it was "GPL-2.0 WITH
         Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:
      
         SPDX license identifier                            # files
         ---------------------------------------------------|-------
         GPL-2.0 WITH Linux-syscall-note                        930
      
         and resulted in the second patch in this series.
      
       - if a file had some form of licensing information in it, and was one
         of the */uapi/* ones, it was denoted with the Linux-syscall-note if
         any GPL family license was found in the file or had no licensing in
         it (per prior point).  Results summary:
      
         SPDX license identifier                            # files
         ---------------------------------------------------|------
         GPL-2.0 WITH Linux-syscall-note                       270
         GPL-2.0+ WITH Linux-syscall-note                      169
         ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
         ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
         LGPL-2.1+ WITH Linux-syscall-note                      15
         GPL-1.0+ WITH Linux-syscall-note                       14
         ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
         LGPL-2.0+ WITH Linux-syscall-note                       4
         LGPL-2.1 WITH Linux-syscall-note                        3
         ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
         ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1
      
         and that resulted in the third patch in this series.
      
       - when the two scanners agreed on the detected license(s), that became
         the concluded license(s).
      
       - when there was disagreement between the two scanners (one detected a
         license but the other didn't, or they both detected different
         licenses) a manual inspection of the file occurred.
      
       - In most cases a manual inspection of the information in the file
         resulted in a clear resolution of the license that should apply (and
         which scanner probably needed to revisit its heuristics).
      
       - When it was not immediately clear, the license identifier was
         confirmed with lawyers working with the Linux Foundation.
      
       - If there was any question as to the appropriate license identifier,
         the file was flagged for further research and to be revisited later
         in time.
      
      In total, over 70 hours of logged manual review was done on the
      spreadsheet to determine the SPDX license identifiers to apply to the
      source files by Kate, Philippe, Thomas and, in some cases, confirmation
      by lawyers working with the Linux Foundation.
      
      Kate also obtained a third independent scan of the 4.13 code base from
      FOSSology, and compared selected files where the other two scanners
      disagreed against that SPDX file, to see if there was new insights.  The
      Windriver scanner is based on an older version of FOSSology in part, so
      they are related.
      
      Thomas did random spot checks in about 500 files from the spreadsheets
      for the uapi headers and agreed with SPDX license identifier in the
      files he inspected. For the non-uapi files Thomas did random spot checks
      in about 15000 files.
      
      In initial set of patches against 4.14-rc6, 3 files were found to have
      copy/paste license identifier errors, and have been fixed to reflect the
      correct identifier.
      
      Additionally Philippe spent 10 hours this week doing a detailed manual
      inspection and review of the 12,461 patched files from the initial patch
      version early this week with:
       - a full scancode scan run, collecting the matched texts, detected
         license ids and scores
       - reviewing anything where there was a license detected (about 500+
         files) to ensure that the applied SPDX license was correct
       - reviewing anything where there was no detection but the patch license
         was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
         SPDX license was correct
      
      This produced a worksheet with 20 files needing minor correction.  This
      worksheet was then exported into 3 different .csv files for the
      different types of files to be modified.
      
      These .csv files were then reviewed by Greg.  Thomas wrote a script to
      parse the csv files and add the proper SPDX tag to the file, in the
      format that the file expected.  This script was further refined by Greg
      based on the output to detect more types of files automatically and to
      distinguish between header and source .c files (which need different
      comment types.)  Finally Greg ran the script using the .csv files to
      generate the patches.
      Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org>
      Reviewed-by: NPhilippe Ombredanne <pombredanne@nexb.com>
      Reviewed-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      b2441318
  3. 17 10月, 2017 3 次提交
  4. 05 6月, 2017 1 次提交
  5. 10 2月, 2017 1 次提交
  6. 18 12月, 2016 2 次提交
    • T
      x86/tsc: Limit the adjust value further · 8c9b9d87
      Thomas Gleixner 提交于
      Adjust value 0x80000000 and other values larger than that render the TSC
      deadline timer disfunctional.
      
      We have not yet any information about this from Intel, but experimentation
      clearly proves that this is a 32/64 bit and sign extension issue.
      
      If adjust values larger than that are actually required, which might be the
      case for physical CPU hotplug, then we need to disable the deadline timer
      on the affected package/CPUs and use the local APIC timer instead.
      
      That requires some surgery in the APIC setup code, so we just limit the
      ADJUST register value into the known to work range for now and revisit this
      when Intel comes forth with proper information.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Roland Scheidegger <rscheidegger_lists@hispeed.ch>
      Cc: Bruce Schlobohm <bruce.schlobohm@intel.com>
      Cc: Kevin Stanton <kevin.b.stanton@intel.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      8c9b9d87
    • T
      x86/tsc: Annotate printouts as firmware bug · 16588f65
      Thomas Gleixner 提交于
      Make it more obvious that the BIOS is screwed up.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Roland Scheidegger <rscheidegger_lists@hispeed.ch>
      Cc: Bruce Schlobohm <bruce.schlobohm@intel.com>
      Cc: Kevin Stanton <kevin.b.stanton@intel.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      16588f65
  7. 15 12月, 2016 2 次提交
    • T
      x86/tsc: Force TSC_ADJUST register to value >= zero · 5bae1562
      Thomas Gleixner 提交于
      Roland reported that his DELL T5810 sports a value add BIOS which
      completely wreckages the TSC. The squirmware [(TM) Ingo Molnar] boots with
      random negative TSC_ADJUST values, different on all CPUs. That renders the
      TSC useless because the sycnchronization check fails.
      
      Roland tested the new TSC_ADJUST mechanism. While it manages to readjust
      the TSCs he needs to disable the TSC deadline timer, otherwise the machine
      just stops booting.
      
      Deeper investigation unearthed that the TSC deadline timer is sensitive to
      the TSC_ADJUST value. Writing TSC_ADJUST to a negative value results in an
      interrupt storm caused by the TSC deadline timer.
      
      This does not make any sense and it's hard to imagine what kind of hardware
      wreckage is behind that misfeature, but it's reliably reproducible on other
      systems which have TSC_ADJUST and TSC deadline timer.
      
      While it would be understandable that a big enough negative value which
      moves the resulting TSC readout into the negative space could have the
      described effect, this happens even with a adjust value of -1, which keeps
      the TSC readout definitely in the positive space. The compare register for
      the TSC deadline timer is set to a positive value larger than the TSC, but
      despite not having reached the deadline the interrupt is raised
      immediately. If this happens on the boot CPU, then the machine dies
      silently because this setup happens before the NMI watchdog is armed.
      
      Further experiments showed that any other adjustment of TSC_ADJUST works as
      expected as long as it stays in the positive range. The direction of the
      adjustment has no influence either. See the lkml link for further analysis.
      
      Yet another proof for the theory that timers are designed by janitors and
      the underlying (obviously undocumented) mechanisms which allow BIOSes to
      wreckage them are considered a feature. Well done Intel - NOT!
      
      To address this wreckage add the following sanity measures:
      
      - If the TSC_ADJUST value on the boot cpu is not 0, set it to 0
      
      - If the TSC_ADJUST value on any cpu is negative, set it to 0
      
      - Prevent the cross package synchronization mechanism from setting negative
        TSC_ADJUST values.
      Reported-and-tested-by: NRoland Scheidegger <rscheidegger_lists@hispeed.ch>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Bruce Schlobohm <bruce.schlobohm@intel.com>
      Cc: Kevin Stanton <kevin.b.stanton@intel.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Allen Hung <allen_hung@dell.com>
      Cc: Borislav Petkov <bp@alien8.de>
      Link: http://lkml.kernel.org/r/20161213131211.397588033@linutronix.deSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      5bae1562
    • T
      x86/tsc: Validate TSC_ADJUST after resume · 6a369583
      Thomas Gleixner 提交于
      Some 'feature' BIOSes fiddle with the TSC_ADJUST register during
      suspend/resume which renders the TSC unusable.
      
      Add sanity checks into the resume path and restore the
      original value if it was adjusted.
      Reported-and-tested-by: NRoland Scheidegger <rscheidegger_lists@hispeed.ch>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Bruce Schlobohm <bruce.schlobohm@intel.com>
      Cc: Kevin Stanton <kevin.b.stanton@intel.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Allen Hung <allen_hung@dell.com>
      Cc: Borislav Petkov <bp@alien8.de>
      Link: http://lkml.kernel.org/r/20161213131211.317654500@linutronix.deSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      6a369583
  8. 01 12月, 2016 1 次提交
  9. 30 11月, 2016 8 次提交
  10. 06 7月, 2015 1 次提交
    • A
      x86/asm/tsc/sync: Use rdtsc_ordered() in check_tsc_warp() and drop extra barriers · eee6946e
      Andy Lutomirski 提交于
      Using get_cycles was unnecessary: check_tsc_warp() is not called
      on TSC-less systems. Replace rdtsc_barrier(); get_cycles() with
      rdtsc_ordered().
      
      While we're at it, make the somewhat more dangerous change of
      removing barrier_before_rdtsc after RDTSC in the TSC warp check
      code. This should be okay, though -- the vDSO TSC code doesn't
      have that barrier, so, if removing the barrier from the warp
      check would cause us to detect a warp that we otherwise wouldn't
      detect, then we have a genuine bug.
      Signed-off-by: NAndy Lutomirski <luto@kernel.org>
      Signed-off-by: NBorislav Petkov <bp@suse.de>
      Cc: Andy Lutomirski <luto@amacapital.net>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Brian Gerst <brgerst@gmail.com>
      Cc: Denys Vlasenko <dvlasenk@redhat.com>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Huang Rui <ray.huang@amd.com>
      Cc: John Stultz <john.stultz@linaro.org>
      Cc: Len Brown <lenb@kernel.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: kvm ML <kvm@vger.kernel.org>
      Link: http://lkml.kernel.org/r/387c4c3a75f875bcde6cd68cee013273a744f364.1434501121.git.luto@kernel.orgSigned-off-by: NIngo Molnar <mingo@kernel.org>
      eee6946e
  11. 27 5月, 2015 1 次提交
  12. 07 1月, 2014 1 次提交
  13. 15 7月, 2013 1 次提交
    • P
      x86: delete __cpuinit usage from all x86 files · 148f9bb8
      Paul Gortmaker 提交于
      The __cpuinit type of throwaway sections might have made sense
      some time ago when RAM was more constrained, but now the savings
      do not offset the cost and complications.  For example, the fix in
      commit 5e427ec2 ("x86: Fix bit corruption at CPU resume time")
      is a good example of the nasty type of bugs that can be created
      with improper use of the various __init prefixes.
      
      After a discussion on LKML[1] it was decided that cpuinit should go
      the way of devinit and be phased out.  Once all the users are gone,
      we can then finally remove the macros themselves from linux/init.h.
      
      Note that some harmless section mismatch warnings may result, since
      notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
      are flagged as __cpuinit  -- so if we remove the __cpuinit from
      arch specific callers, we will also get section mismatch warnings.
      As an intermediate step, we intend to turn the linux/init.h cpuinit
      content into no-ops as early as possible, since that will get rid
      of these warnings.  In any case, they are temporary and harmless.
      
      This removes all the arch/x86 uses of the __cpuinit macros from
      all C files.  x86 only had the one __CPUINIT used in assembly files,
      and it wasn't paired off with a .previous or a __FINIT, so we can
      delete it directly w/o any corresponding additional change there.
      
      [1] https://lkml.org/lkml/2013/5/20/589
      
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: x86@kernel.org
      Acked-by: NIngo Molnar <mingo@kernel.org>
      Acked-by: NThomas Gleixner <tglx@linutronix.de>
      Acked-by: NH. Peter Anvin <hpa@linux.intel.com>
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      148f9bb8
  14. 22 2月, 2012 1 次提交
    • S
      x86/tsc: Reduce the TSC sync check time for core-siblings · b0e5c779
      Suresh Siddha 提交于
      For each logical CPU that is coming online, we spend 20msec for
      checking the TSC synchronization. And as this is done
      sequentially for each logical CPU boot, this time gets added up
      depending on the number of logical CPU's supported by the
      platform.
      
      Minimize this by using the socket topology information.
      
      If the target CPU coming online doesn't have any of its
      core-siblings online, a timeout of 20msec will be used for the
      TSC-warp measurement loop. Otherwise a smaller timeout of 2msec
      will be used, as we have some information about this socket
      already (and this information grows as we have more and more
      logical-siblings in that socket).
      
      Ideally we should be able to skip the TSC sync check on the
      other core-siblings, if the first logical CPU in a socket passed
      the sync test. But as the TSC is per-logical CPU and can
      potentially be modified wrongly by the bios before the OS boot,
      TSC sync test for smaller duration should be able to catch such
      errors. Also this will catch the condition where all the cores
      in the socket doesn't get reset at the same time.
      
      For example, with this modification, time spent in TSC sync
      checks on a 4 socket 10-core with HT system gets reduced from
      1580msec to 212msec.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Acked-by: NArjan van de Ven <arjan@linux.intel.com>
      Acked-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Jack Steiner <steiner@sgi.com>
      Cc: venki@google.com
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Link: http://lkml.kernel.org/r/1328581940.29790.20.camel@sbsiddha-desk.sc.intel.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
      b0e5c779
  15. 06 12月, 2011 1 次提交
  16. 15 12月, 2009 3 次提交
  17. 26 11月, 2009 1 次提交
    • M
      x86: Limit number of per cpu TSC sync messages · 9b3660a5
      Mike Travis 提交于
      Limit the number of per cpu TSC sync messages by only printing
      to the console if an error occurs, otherwise print as a DEBUG
      message.
      
      The info message "Skipping synchronization ..." is only printed
      after the last cpu has booted.
      Signed-off-by: NMike Travis <travis@sgi.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Roland Dreier <rdreier@cisco.com>
      Cc: Randy Dunlap <rdunlap@xenotime.net>
      Cc: Tejun Heo <tj@kernel.org>
      Cc: Andi Kleen <andi@firstfloor.org>
      Cc: Greg Kroah-Hartman <gregkh@suse.de>
      Cc: Yinghai Lu <yhlu.kernel@gmail.com>
      Cc: David Rientjes <rientjes@google.com>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
      Cc: Jack Steiner <steiner@sgi.com>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      LKML-Reference: <20091118002222.181053000@alcatraz.americas.sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      9b3660a5
  18. 24 9月, 2009 1 次提交
    • R
      x86: Reduce verbosity of "TSC is reliable" message · ea01c0d7
      Roland Dreier 提交于
      On modern systems, the kernel prints the message
      
          Skipping synchronization checks as TSC is reliable.
      
      once for every non-boot CPU.
      
      This gets kind of ridiculous on huge systems; for example, on a
      64-thread system I was lucky enough to get:
      
          $ dmesg | grep 'TSC is reliable' | wc
               63     567    4221
      
      There's no point to doing this for every CPU, since the code is
      just checking the boot CPU anyway, so change this to a
      printk_once() to make the message appears only once.
      Signed-off-by: NRoland Dreier <rolandd@cisco.com>
      LKML-Reference: <adazl8l2swc.fsf@cisco.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      ea01c0d7
  19. 07 5月, 2009 1 次提交
  20. 18 11月, 2008 1 次提交
    • V
      x86: add rdtsc barrier to TSC sync check · 93ce99e8
      Venki Pallipadi 提交于
      Impact: fix incorrectly marked unstable TSC clock
      
      Patch (commit 0d12cdd5 "sched: improve sched_clock() performance") has
      a regression on one of the test systems here.
      
      With the patch, I see:
      
       checking TSC synchronization [CPU#0 -> CPU#1]:
       Measured 28 cycles TSC warp between CPUs, turning off TSC clock.
       Marking TSC unstable due to check_tsc_sync_source failed
      
      Whereas, without the patch syncs pass fine on all CPUs:
      
       checking TSC synchronization [CPU#0 -> CPU#1]: passed.
      
      Due to this, TSC is marked unstable, when it is not actually unstable.
      This is because syncs in check_tsc_wrap() goes away due to this commit.
      
      As per the discussion on this thread, correct way to fix this is to add
      explicit syncs as below?
      Signed-off-by: NVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      93ce99e8
  21. 02 11月, 2008 1 次提交
    • A
      x86: Add a synthetic TSC_RELIABLE feature bit. · eca0cd02
      Alok Kataria 提交于
      Impact: Changes timebase calibration on Vmware.
      
      Use the synthetic TSC_RELIABLE bit to workaround virtualization anomalies.
      
      Virtual TSCs can be kept nearly in sync, but because the virtual TSC
      offset is set by software, it's not perfect.  So, the TSC
      synchronization test can fail. Even then the TSC can be used as a
      clocksource since the VMware platform exports a reliable TSC to the
      guest for timekeeping purposes. Use this bit to check if we need to
      skip the TSC sync checks.
      
      Along with this also set the CONSTANT_TSC bit when on VMware, since we
      still want to use TSC as clocksource on VM running over hardware which
      has unsynchronized TSC's (opteron's), since the hypervisor will take
      care of providing consistent TSC to the guest.
      Signed-off-by: NAlok N Kataria <akataria@vmware.com>
      Signed-off-by: NDan Hecht <dhecht@vmware.com>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      eca0cd02
  22. 21 8月, 2008 1 次提交
  23. 30 1月, 2008 4 次提交
    • I
      x86: add warning to check_tsc_warp() · ad8ca495
      Ingo Molnar 提交于
      add warning to check_tsc_warp() - if get_cycles() does not progress.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      ad8ca495
    • I
      x86: check_tsc_warp() slowness fix · df43510b
      Ingo Molnar 提交于
      100 million max # of loops is a bit too much - reduce it to 10 million.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      df43510b
    • A
      x86: remove get_cycles_sync · 6d63de8d
      Andi Kleen 提交于
      rdtsc is now speculation-safe, so no need for the sync variants of
      the APIs.
      
      [ mingo@elte.hu: removed the nsec_barrier() complication. ]
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      6d63de8d
    • M
      x86: fix: s2ram + P4 + tsc = annoyance · 4c6b8b4d
      Mike Galbraith 提交于
      s2ram recently became useful here, except for the kernel's annoying
      habit of disabling my P4's perfectly good TSC.
      
      [  107.894470] CPU 1 is now offline
      [  107.894474] SMP alternatives: switching to UP code
      [  107.895832] CPU0 attaching sched-domain:
      [  107.895836]  domain 0: span 1
      [  107.895838]   groups: 1
      [  107.896097] CPU1 is down
      [    3.726156] Intel machine check architecture supported.
      [    3.726165] Intel machine check reporting enabled on CPU#0.
      [    3.726167] CPU0: Intel P4/Xeon Extended MCE MSRs (12) available
      [    3.726170] CPU0: Thermal monitoring enabled
      [    3.726175] Back to C!
      [    3.726708] Force enabled HPET at resume
      [    3.726775] Enabling non-boot CPUs ...
      [    3.727049] CPU0 attaching NULL sched-domain.
      [    3.727165] SMP alternatives: switching to SMP code
      [    3.727858] Booting processor 1/1 eip 3000
      [    3.727862] CPU 1 irqstacks, hard=b042f000 soft=b042d000
      [    3.738173] Initializing CPU#1
      [    3.798912] Calibrating delay using timer specific routine.. 5986.12 BogoMIPS (lpj=2993061)
      [    3.798920] CPU: After generic identify, caps: bfebfbff 00000000 00000000 00000000 00004400 00000000 00000000 00000000
      [    3.798931] CPU: Trace cache: 12K uops, L1 D cache: 8K
      [    3.798934] CPU: L2 cache: 512K
      [    3.798936] CPU: Physical Processor ID: 0
      [    3.798938] CPU: After all inits, caps: bfebfbff 00000000 00000000 0000b080 00004400 00000000 00000000 00000000
      [    3.798946] Intel machine check architecture supported.
      [    3.798952] Intel machine check reporting enabled on CPU#1.
      [    3.798955] CPU1: Intel P4/Xeon Extended MCE MSRs (12) available
      [    3.798959] CPU1: Thermal monitoring enabled
      [    3.799161] CPU1: Intel(R) Pentium(R) 4 CPU 3.00GHz stepping 09
      [    3.799187] checking TSC synchronization [CPU#0 -> CPU#1]:
      [    3.819181] Measured 63588552840 cycles TSC warp between CPUs, turning off TSC clock.
      [    3.819184] Marking TSC unstable due to: check_tsc_sync_source failed.
      
      If check_tsc_warp() is called after initial boot, and the TSC has in the
      meantime been set (BIOS, user, silicon, elves) to a value lower than the
      last stored/stale value, we blame the TSC.  Reset to pristine condition
      after every test.
      Signed-off-by: NMike Galbraith <efault@gmx.de>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      4c6b8b4d