“41aefdcc98fdba47459eab67630293d67e855fc3”上不存在“arch/x86/include/asm/msr.h”
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由 mike.travis@hpe.com 提交于
Add a flag to indicate and process that TSC counters are on chassis that reset at different times during system startup. Therefore which TSC ADJUST values should be zero is not predictable. Signed-off-by: NMike Travis <mike.travis@hpe.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NDimitri Sivanich <dimitri.sivanich@hpe.com> Reviewed-by: NRuss Anderson <russ.anderson@hpe.com> Reviewed-by: NAndrew Banman <andrew.abanman@hpe.com> Reviewed-by: NPeter Zijlstra <peterz@infradead.org> Cc: Prarit Bhargava <prarit@redhat.com> Cc: Andrew Banman <andrew.banman@hpe.com> Cc: Bin Gao <bin.gao@linux.intel.com> Link: https://lkml.kernel.org/r/20171012163201.944370012@stormcage.americas.sgi.com
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