This adds basic support for UP SH-X3.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

We need to know the CPU ID in order to calculate the mask and ack
registers effectively. Stub this in for UP.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch reworks the ipr code by grouping the offset array together
with the ipr_data structure in a new data structure called ipr_desc.
This new structure also contains the name of the controller in struct
irq_chip. The idea behind putting struct irq_chip in there is that we
can use offsetof() to locate the base addresses in the irq_chip
callbacks. This strategy has much in common with the recently merged
intc2 code.

One logic change has been made - the original ipr code enabled the
interrupts by default but with this patch they are all disabled by
default.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The shared intc2 code currently contains cpu-specific #ifdefs.
This is a tad unclean and it prevents us from using the shared code
to drive board-specific irqs on the se7780 board.

This patch reworks the intc2 code by moving the base addresses of
the intc2 registers into struct intc2_desc. This new structure also
contains the name of the controller in struct irq_chip. The idea
behind putting struct irq_chip in there is that we can use offsetof()
to locate the base addresses in the irq_chip callbacks.

One logic change has been made - the original shared intc2 code
enabled the interrupts by default but with this patch they are all
disabled by default.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

lockdep/irqflags tracing on SH-2 ends up with a misaligned
branch, fix it.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

SH-2 can presently get in to some pretty bogus states, so
we tidy up the dependencies a bit and get it all building
again.

This gets us a bit closer to a functional allyesconfig
and allmodconfig, though there are still a few things to
fix up.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This was added during 2.5.x, but was never moved along. This
can easily be resurrected if someone has one they wish to work
with, but it's not worth keeping around in its current form.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds the URAM block on SH7722 as a separate node.
Sparsemem is required for this, or it can simply be disabled
by explicitly selecting a flatmem model.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Now that select no longer works for selecting the "closest" CPU,
we have to explicitly reference the precise sub-type in the few
places where it actually matters (presently only setup code and
some legacy sh-sci cruft).
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

With the SH7722 changes, ->set_rate() also takes an algo_id,
SH4-202 was overlooked when this change went in.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

If CONFIG_KGDB_NMI is disabled, we're left with a stray in_nmi
reference that can't be resolved. Move the symbol under the ifdef,
too.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Several errors were spotted during building for custom config (SMP
included). Although SMP still does not compile (no ipi and
__smp_call_function) and does not work, this looks a bit cleaner.
Some other errors obtained via gcc-4.1.0 build.
Signed-off-by: NEvgeniy Polyakov <johnpol@2ka.mipt.ru>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add lost in_nmi definition to solve pcrel too far.
Signed-off-by: NTakashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This fixes up the master clock multiplier and initial rate
propagation for the SH7722 clocks.
Signed-off-by: Ndmitry pervushin <dimka@nomadgs.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

- setup-sh7750.c only defines the sh7751_ipr_map when building
  with SH7751 support.

- 7722 Solution Engine was missing a mach-type entry, causing
  the macro in cf-enabler to be undefined.

- arch/sh/mm/init.c needs linux/pagemap.h.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Spelling fixes in arch/sh/.
Signed-off-by: NSimon Arlott <simon@fire.lp0.eu>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Many files include the filename at the beginning, serveral used a wrong one.
Signed-off-by: NUwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Signed-off-by: NAdrian Bunk <bunk@stusta.de>

Add a CPU flag for the CPUs that support 32-bit opcodes, which
gets passed down to userspace.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

There are a few different cases for figuring out how to
size the instruction. We read in the instruction located
at regs->pc - 4 when rewinding the opcode to figure out if
there's a 32-bit opcode before the faulting instruction, with
a default of a - 2 adjustment on a mismatch. In practice this
works for the cases where pc - 4 is just another 16-bit opcode,
or we happen to have a 32-bit and a 16-bit immediately
preceeding the pc value.

In the cases where we aren't rewinding, this is much less ugly..

We also don't bother fixing up the places where we're explicitly
dealing with 16-bit instructions, since this might lead to
confusion regarding the encoding size possibilities on other
CPU variants.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

SH-2A supports both 16 and 32-bit instructions, add a simple helper
for figuring out the instruction size in the places where there are
hardcoded 16-bit assumptions.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The only difference between these at the moment are the FPU
exceptions, and these are hidden away under CONFIG_SH_FPU
(which is only set for the SH-4 case anyways..).

This consolidates the two tables, and updates SH-4 to use
the updated copy.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Some fixups for the R7785RP board. Gets iVDR working.
Signed-off-by: NRyusuke Sakato <sakato.ryusuke@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

hp6xx requires some additional IRQs that aren't currently enabled in
the SH7709 setup code. Wire them up.
Signed-off-by: NTakashi YOSHII <takashi.yoshii.ze@hitachi.com>
Signed-off-by: NKristoffer Ericson <kristoffer.ericson@gmail.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Previously this was done in cpuinfo, but with the number of clocks
growing, it makes more sense to place this in a different proc entry.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This fixes up SH7705 CPU support and the SE7705 board
for some of the recent changes.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds support for the SH7722 (MobileR) to the clock framework.
Signed-off-by: Ndmitry pervushin <dimka@nomadgs.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Support the SH7712 (SH3-DSP) Solution Engine reference board.
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds preliminary support for the SH7785-based Highlander board.
Some of the Highlander support code is reordered so that most of it
can be reused directly.

This also plugs in missing SH7785 checks in the places that need it,
as this is the first board to support the CPU.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

SH7780 has a speculative execution mode where it can speculatively
perform an instruction fetch for subroutine returns, this allows it
to be enabled. There are some various pitfalls associated with this
mode, so it's left as depending on CONFIG_EXPERIMENTAL and not
enabled by default.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

SH-3 and SH-4 were trampling the register, and SH-2 wasn't even
setting it in the first place. This ended up with some rather
broken behaviour in the sysrq show_regs().
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The code for performing the calculation was only in the SH-4 probe
path, move it out to the common path so the other parts get this
right too.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The C99 specification states in section 6.11.5:

The placement of a storage-class specifier other than at the
beginning of the declaration specifiers in a declaration is an
obsolescent feature.
Signed-off-by: NTobias Klauser <tklauser@distanz.ch>
Signed-off-by: NAdrian Bunk <bunk@stusta.de>

This tidies up some of the rts7751r2d mess and gets it booting
again. Update the defconfig, too.
Signed-off-by: NMasayuki Hosokawa <hosokawa@ace-jp.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This ended up causing problems for older parts (particularly ones
using PTEA). Revert this for now, it can be added back in once it's
had some more testing.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

There are a lot of bogus cpu_data-> references that only end up working
for the boot CPU, convert these to current_cpu_data to fixup SMP.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Previously this was implemented using a global cache, cache
this per-CPU instead and bump up the number of context IDs to
match NR_CPUS.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch does the following:
- remove the make_ipr_irq stuff from dma-sh.c and replace it
  with a simple channel<->irq mapping table.
- add DMTEx_IRQ constants for sh4 cpus
- fix sh7751 DMAE irq number

The SH7780 uses the same IRQs for DMA as other SH4 types, so
I put the constants on top of the dma.h file.

Other CPU types need to #define their own DMTEx_IRQ contants
in their appropriate header.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add SH7760 IPR IRQ data; makes 2.6.20-rc bootable again.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This converts the lazy dcache handling to the model described in
Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks
used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a
bonus, this slightly cuts down on the cache flushing frequency.

With that and the PTEA handling out of the way, the update_mmu_cache()
implementations can be consolidated, and we no longer have to worry
about which configuration the cache is in for the SH7705 case.

And finally, explicitly disable the lazy writeback on SMP (SH-4A).
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>