- 29 6月, 2012 4 次提交
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由 Chandrabhanu Mahapatra 提交于
DISPC functions have been modified to provide clock and register dumps and debug support for the LCD3 manager. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Chandrabhanu Mahapatra 提交于
The support for LCD3 manager has been added into the manager module. LCD3 panel has registers as DISPC_CONTROL3 and DISPC_CONFIG3 just like those in LCD and LCD2 panels. These registers control the Display Controller (DISPC) module for LCD3 output. The three LCDs support Display Serial Interface (DSI), Remote Frame Buffer Interface (RFBI) and Parallel CMOS Output Interface (DPI). These LCDs can be connected through parallel output interface using DISPC and RFBI or DPI. For serial interface DSS uses DSI. The LCD3 panel, just like LCD and LCD2 panels, has a clock switch in DSS_CTRL register which has been enabled. The clock switch chooses between DSS_CLK and DPLL_DSI1_C_CLK1 as source for LCD3_CLK. New IRQs as DISPC_IRQ_VSYNC3, DISPC_IRQ_FRAMEDONE3, DISPC_IRQ_ACBIAS_COUNT_STAT3 and DISPC_IRQ_SYNC_LOST3 have been added specific to the new manager. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Chandrabhanu Mahapatra 提交于
The current implementation of LCD channels and managers consists of a number of if-else construct which has been replaced by a simpler interface. A constant structure mgr_desc has been created in Display Controller (DISPC) module. The mgr_desc contains for each channel its name, irqs and is initialized one time with all registers and their corresponding fields to be written to enable various features of Display Subsystem. This structure is later used by various functions of DISPC which simplifies the further implementation of LCD channels and its corresponding managers. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
If runtime PM is not enabled in the kernel config, pm_runtime_get_sync() will always return 1 and pm_runtime_put_sync() will always return -ENOSYS. pm_runtime_get_sync() returning 1 presents no problem to the driver, but -ENOSYS from pm_runtime_put_sync() causes the driver to print a warning. One option would be to ignore errors returned by pm_runtime_put_sync() totally, as they only say that the call was unable to put the hardware into suspend mode. However, I chose to ignore the returned -ENOSYS explicitly, and print a warning for other errors, as I think we should get notified if the HW failed to go to suspend properly. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Cc: Jassi Brar <jaswinder.singh@linaro.org> Cc: Grazvydas Ignotas <notasas@gmail.com>
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- 22 5月, 2012 5 次提交
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由 Archit Taneja 提交于
DSS2 driver uses the timings in manager's private data to check the validity of overlay and manager infos written by the user. For VENC interface, we divide the Y resolution by half when writing to the DISPC_DIGIT_SIZE register as the content is interlaced. However, the height of the manager/display with respect to the content shown through VENC still remains the same. The VENC driver divides the y_res parameter in omap_video_timings by half, and then applies the configuration. This leads to manager's private data storing the wrong Y resolution. Hence, overlay related checks fail. Ensure that manager's private data stores the original timings, and the Y resolution is halved only when we write to the DISPC register. This is a hack, the proper solution would be to pass some sort of interlace parameter which makes the call whether we should divide y_res or not. Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Chandrabhanu Mahapatra 提交于
TILER is a block in OMAP4's DMM which lets DSS fetch frames in a rotated manner. Physical memory can be mapped to a portion of OMAP's system address space called TILER address space. The TILER address space is split into 8 views. Each view represents a rotated or mirrored form of the mapped physical memory. When a DISPC overlay's base address is programmed to one of these views, the TILER fetches the pixels according to the orientation of the view. A view is further split into 4 containers, each container holds elements of a particular size. Rotation can be achieved at the granularity of elements in the container. For more information on TILER, refer to the Memory Subsytem section in OMAP4 TRM. Rotation type TILER has been added which is used to exploit the capabilities of these 8 views for performing various rotations. When fetching from addresses mapped to TILER space, the DISPC DMA can fetch pixels in either 1D or 2D bursts. The fetch depends on which TILER container we are accessing. Accessing 8, 16 and 32 bit sized containers requires 2D bursts, and page mode sized containers require 1D bursts. The DSS2 user is expected to provide the Tiler address of the view that it is interested in. This is passed to the paddr and p_uv_addr parameters in omap_overlay_info. It is also expected to provide the stride value based on the view's orientation and container type, this should be passed to the screen_width parameter of omap_overlay_info. In calc_tiler_rotation_offset screen_width is used to calculate the required row_inc for DISPC. x_predecim and y_predecim are also used to calculate row_inc and pix_inc thereby adding predecimation support for TILER. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
If CONFIG_BUG is not enabled, BUG() does not stop the execution. Many places in code expect the execution to stop, and this causes compiler warnings about uninitialized variables and returning from a non-void function without a return value. This patch fixes the warnings by initializing the variables and returning properly after BUG() lines. However, the behaviour is still undefined after the BUG, but this is the choice the user makes when using CONFIG_BUG=n. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
Commit 05dd0f53 ("OMAPDSS: DISPC: Update Accumulator configuration for chroma plane") adds dispc_ovl_set_accu_uv() function that sets the accu, but the function only handles YUV and NV12 modes, and BUGs otherwise. The patch also adds a call to the function, but unfortunately the place of call was such that the mode could be other than YUV or NV12, thus crashing the driver. This patchs moves the call to a slightly later spot, at which point only YUV and NV12 modes are handled. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Cc: Chandrabhanu Mahapatra <cmahapatra@ti.com>
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由 Tomi Valkeinen 提交于
There is a problem related to DSS FIFO thresholds and power management on OMAP3. It seems that when the full PM hits in, we get underflows. The core reason is unknown, but after experiments it looks like only particular FIFO thresholds work correctly. This bug is related to an earlier patch, which added special FIFO threshold configuration for OMAP3, because DSI command mode output didn't work with the normal threshold configuration. However, as the above work-around worked fine for other output types also, we currently always configure thresholds in this special way on OMAP3. In theory there should be negligible difference with this special way and the standard way. The first paragraph explains what happens in practice. This patch changes the driver to use the special threshold configuration only when the output is a manual update display on OMAP3. This does include RFBI displays also, and although it hasn't been tested (no boards using RFBI) I suspect the similar behaviour is present there also, as the DISPC side should work similarly for DSI command mode and RFBI. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Cc: Joe Woodward <jw@terrafix.co.uk>
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- 15 5月, 2012 1 次提交
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由 Chandrabhanu Mahapatra 提交于
DISPC has two accumulator registers DISPC_VIDp_ACCU_0 and DISPC_VIDp_ACCU_1 each with horizontal and vertical bit fields. The bit fields can take values in the range of -1024 to 1023. Based on bit field values DISPC decides on which one out of 8 phases the filtering starts. DISPC_VIDp_ACCU_0 is used for progressive output and for interlaced output both DISPC_VIDp_ACCU_0 and DISPC_VIDp_ACCU_1 are used. The current accumulator values in DISPC scaling logic for chroma plane takes default values for all color modes and rotation types. So, the horizontal and vertical up and downsampling accumulator bit field values have been updated for better performance. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 11 5月, 2012 6 次提交
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由 Tomi Valkeinen 提交于
Now that we are using platform_driver_probe() we can add __inits and __exits all around. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
Instead of having an ugly #ifdef mess in the core.c for creating debugfs files, add a dss_debugfs_create_file() function that the dss drivers can use to create the debugfs files. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
Now that the omapdss_core device is the parent for all other dss devices, we don't need to use the dss_runtime_get/put anymore. Instead, enabling omapdss_core will happen automatically when a child device is enabled. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
The platform devices for omapdss, dss and dispc drivers are always present, so we can use platform_driver_probe instead of platform_driver_register. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
For unknown reasons we seem to have a return in each of the omapdss's uninit functions, which is a void function. Remove the returns. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
The omapdss pdata handling is a mess. This is more evident when trying to use device tree for DSS, as we don't have platform data anymore in that case. This patch cleans the pdata handling by: - Remove struct omap_display_platform_data. It was used just as a wrapper for struct omap_dss_board_info. - Pass the platform data only to omapdss device. The drivers for omap dss hwmods do not need the platform data. This should also work better for DT, as we can create omapdss device programmatically in generic omap boot code, and thus we can pass the pdata to it. - Create dss functions for get_ctx_loss_count and dsi_enable/disable_pads that the dss hwmod drivers can call. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 09 5月, 2012 4 次提交
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由 Archit Taneja 提交于
The functions calc_fclk_five_taps() and check_horiz_timing_omap3() use the function dispc_mgr_get_device() to get the omap_dss_device pointer to which the manager is connected, the width of the panel is derived from that. The manager's timing is stored in it's private data in APPLY. This contains the latest timings applied to the manager. Pass these timings to dispc_ovl_setup() and use them in the above functions. Remove the function dispc_mgr_get_device() as it isn't used any more. Signed-off-by: NArchit Taneja <archit@ti.com>
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由 Archit Taneja 提交于
The pixel clock rate for the TV manager is calculated by checking the device type connected to the manager, and then requesting the VENC/HDMI interface for the pixel clock rate. Remove the use of omap_dss_device pointer from here by checking which interface generates the pixel clock by reading the DSS_CTRL.VENC_HDMI_SWITCH bit. Signed-off-by: NArchit Taneja <archit@ti.com>
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由 Archit Taneja 提交于
Create a function dss_mgr_check_timings() which wraps around the function dispc_mgr_timings_ok(). This is mainly a clean up to hide dispc functions from interface drivers. dss_mgr_check_timings() is added in the function dss_mgr_check(), it currently takes the timings maintained in the omap_dss_device struct. This would be later replaced by the timings stored in the manager's private data. Make dss_mgr_check_timings() and dispc_mgr_timings_ok() take a const omap_video_timings pointer since these functions just check the timings. Signed-off-by: NArchit Taneja <archit@ti.com>
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由 Archit Taneja 提交于
Fake VSYNC support is a hack and has some bugs in it. It isn't used by any user of DSS. Remove Fake VSYNC support. For DSI command mode and RFBI panels, a user of DSS should wait for the completion of a frame by using the panel driver's sync op. Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 03 5月, 2012 3 次提交
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由 Chandrabhanu Mahapatra 提交于
DISPC_FCLK is incorrectly used as functional clock of DISPC in scaling calculations. So, DISPC_CORE_CLK replaces as functional clock of DISPC. DISPC_CORE_CLK is derived from DISPC_FCLK divided by an independent DISPC divisor LCD. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Chandrabhanu Mahapatra 提交于
In OMAP3 DISPC video overlays suffer from some undocumented horizontal position and timing related limitations leading to SYNCLOST errors. Whenever the image window is moved towards the right of the screen SYNCLOST errors become frequent. Checks have been implemented to see that DISPC driver rejects configuration exceeding above limitations. This code was successfully tested on OMAP3. This code is written based on code written by Ville Syrjälä <ville.syrjala@nokia.com> in Linux OMAP kernel. Ville Syrjälä <ville.syrjala@nokia.com> had added checks for video overlay horizontal timing and DISPC horizontal blanking length limitations. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Chandrabhanu Mahapatra 提交于
In OMAP3 and OMAP4, the DISPC Scaler can downscale an image up to 4 times, and up to 2 times in OMAP2. However, with predecimation, the image can be reduced to 16 times by fetching only the necessary pixels in memory. Then this predecimated image can be downscaled further by the DISPC scaler. The pipeline is configured to use a burst of size 8 * 128 bits which consists of 8 mini bursts of 16 bytes each. So, horizontal predecimation more than 16 can lead to complete discarding of such mini bursts. L3 interconnect may handover the bus to some other initiator and inturn delay the fetching of pixels leading to underflows. So, maximum predecimation limit is fixed at 16. Based on the downscaling required, a prior calculation of predecimation values for width and height of an image is done. Since, Predecimation reduces quality of an image higher priorty is given to DISPC Scaler for downscaling. This code was successfully tested on OMAP2, OMAP3 and OMAP4. Horizontal and vertical predecimation worked fine except for some synclost errors due to undocumented errata in OMAP3 which are fixed later and skewed images were seen on OMAP2 and OMAP3 during horizontal predecimation which will be addressed in the future patches. This code is based on code written by Lajos Molnar <lajos@ti.com> who had added predecimation support for NV12/YUV/rotated/SDMA buffers. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 23 4月, 2012 3 次提交
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由 Archit Taneja 提交于
Clean up the DISPC manager timings related function by: - Create a common function to set size for LCD and TV. - Create a common function to check timings for LCD and TV. - Add dss params to get the range of manager size. Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Archit Taneja 提交于
Currently, a LCD manager's timings is set by dispc_mgr_set_lcd_timings() and TV manager's timings is set by dispc_set_digit_size(). Use a common function called dispc_mgr_set_timings() which sets timings for both type of managers. We finally want the interface drivers to use an overlay manager function to configure it's timings, having a common DISPC function would make things cleaner. For LCD managers, dispc_mgr_set_timings() sets LCD size and blanking values, for TV manager, it sets only the TV size since blanking values don't exist for TV. Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Archit Taneja 提交于
The RFBI driver uses dispc_mgr_set_lcd_size() to set the width and height of the LCD manager. Replace this to use dispc_mgr_set_lcd_timings(), pass dummy blanking parameters like done in the DSI driver. This prevents the need to export dispc_mgr_set_lcd_size(), and use a common function to set lcd timings. Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 06 3月, 2012 1 次提交
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由 Lajos Molnar 提交于
Add missing but supported color formats for GFX pipeline in dss features: RGBX16-4444, RGBA16-4444 and XRGB16-1555. In dispc_ovl_set_color_mode(): - Remove unsupported modes on GFX pipeline: YUV2 and UYVY. Replace these by missing modes supported by GFX pipelines: RGBX16-4444 and RGBA16-4444. - Fix swapped modes on VID pipelines: RGBX16-4444 and XRGB16-4444. Signed-off-by: NLajos Molnar <lajos@ti.com> Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 25 2月, 2012 1 次提交
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由 Tony Lindgren 提交于
This is only needed when using SRAM for framebuffer, and the support for SRAM framebuffer is about to get removed. Otherwise we cannot move most of plat/io.h to be a local iomap.h for mach-omap2. Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: linux-fbdev@vger.kernel.org Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 23 2月, 2012 1 次提交
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由 Tomi Valkeinen 提交于
OMAP SRAM can be used as video memory on OMAP1 and 2. However, there usually is very little SRAM available, thus limiting its use, and no board supported by the kernel currently uses it. This patch removes the use of SRAM as video ram for the omapdss driver to simplify memory handling. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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- 21 2月, 2012 2 次提交
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由 Archit Taneja 提交于
The calculation of required DISPC_FCLK for downscaling is done by multplying the pixel clock with an integer factor. This isn't true for OMAP4 where the required clock is calculated using the exact ratio of downscaling done. Fix this calculation for OMAP4. Also, do a minor clean up of calc_fclk(). Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
Now that dss is using devm_ functions for allocation in probe functions, small reordering of the allocations allows us to clean up the probe functions more. This patch moves "unmanaged" allocations after the managed ones, and uses plain returns instead of gotos where possible. This lets us remove a bunch of goto labels, simplifying the probe's error handling. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 26 1月, 2012 1 次提交
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由 Tomi Valkeinen 提交于
omapdss doesn't work properly on system suspend. The problem seems to be the fact that omapdss uses pm_runtime_put() functions when turning off the hardware, and when system suspend is in process only sync versions are allowed. Using non-sync versions normally and sync versions when suspending would need rather ugly hacks to convey the information of suspending/not-suspending to different functions. Optimally the driver wouldn't even need to care about this, and the PM layer would handle syncing when suspend is in process. This patch changes all omapdss's pm_runtime_put calls to pm_runtime_put_sync. This fixes the suspend problem, and probably the performance penalty of always using sync versions is negligible. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NKevin Hilman <khilman@ti.com>
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- 25 1月, 2012 5 次提交
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由 Julia Lawall 提交于
The various devm_ functions allocate memory that is released when a driver detaches. This patch uses these functions for data that is allocated in the probe function of a platform device and is only freed in the remove function. Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
Take fifo merge into use by implementing a rather naive fifo merge threshold calculation: keep the low threshold always the same, but increase the high threshold when fifo merge is used. This should greatly increase the time between pixel data fetches from SDRAM, as the usable fifo size is much larger. However, it probably won't help for fifo underflows, as the low threshols is kept the same. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
Move fifo threshold calculation into dispc.c, as the thresholds are really dispc internal thing. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
Fifo thresholds are calculated using bytes, but the debug print prints values in buffer units. Change the prints to use bytes to be in line with the calculations, and also to print in the same units on all OMAPs. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
Add feature flag for fifo merge. OMAP2 doesn't contain fifo merge, later OMAPs do. dispc_enable_fifomerge() checks for the flag when called, and gives a WARN if fifo merge is being enabled when it is not supported. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 02 1月, 2012 3 次提交
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由 Chandrabhanu Mahapatra 提交于
Clock requirements for scaling in OMAP2, OMAP3 and OMAP4 are different. In OMAP2 and OMAP3 the required clock rate is a function of pixel clock, vertical downscale ratio and horizontal downscale ratio whereas in OMAP4 it is a function of pixel clock and horizontal downscale ratio only. Selection of 3-tap vs 5-tap coefficients depends on clock rate line buffer width in OMAP3 whereas in OMAP4 it is independent of clock rate and line buffer width. In OMAP2 3-tap for vertical and 5-tap for horizontal scaling is used. In OMAP4 5-tap is used both for horizontal and vertical scaling for better performance. Also, the number and width of line buffers differs in OMAP3 and OMAP4. So, clock functions have been fined tuned for OMAP3 and support has been added added for OMAP4. This code has been tested on OMAP2, OMAP3 and OMAP4, and scaling issues due to clock errors have been resolved. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Chandrabhanu Mahapatra 提交于
The FIR coefficients present in kernel are being updated to new coefficients consisting of 24 coefficient tables, with 12 each for 3 tap and 5 tap scenario, which are chosen on the basis of DISPC up/downsampling filters M value. M is the inverse of low pass cut off frequency of the sampling filter. For vertical scaling 3 tap or 5 tap tables are used based on the clock rate and width of the line buffer whereas in OMAP2 3 tap is always used. For horizontal scaling however 5 tap tables are always used. New coefficients and the corresponding logic have been tested on OMAP2, OMAP3 and OMAP4. Horizontal and vertical scaling worked fine except for some 3 tap vs 5 tap issue during vertical upscaling and clock failing issues which is acknowledged in the next patch. Vertical upscaling was found to perform better under 5 taps. The 24 coefficient tables have been moved to another file dispc_coefs.c for proper maintainance. This code is written based on code written by Lajos Molnar <lajos@ti.com> in Android Kernel for scaling. Lajos Molnar <lajos@ti.com> had fine tuned the FIR coefficient selection process and reduced outliness and blockiness around images when upscaling more than 2 times. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Rob Clark 提交于
The dispc's error handler tries to disable all outputs when OCP_ERR happens. However, the code doesn't check if there actually is a display on each particular output, nor if there's a driver for the display. This may lead to NULL pointer reference. Signed-off-by: NRob Clark <rob@ti.com> [tomi.valkeinen@ti.com: added patch description] Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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