- 21 9月, 2007 2 次提交
-
-
由 Magnus Damm 提交于
We need a secondary register member in struct intc_prio_reg to support dual priority registers used by ipi on x3. Signed-off-by: NMagnus Damm <damm@igel.co.jp> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
由 Magnus Damm 提交于
This patch converts the cpu specific interrupt setup code for sh7760 from ipr + intc2 to intc. New vectors are also added to match the information provided by the datasheet. Vectors for IRQ4-IRQ7 are enabled by default. Use plat_irq_setup_pins() if pins IRL0-3 should be used in IRLM mode. The patch also adds the SIM block to the serial port platform data. Version two of this patch fixes MMCIF problems reported by Manuel Lauss. Signed-off-by: NMagnus Damm <damm@igel.co.jp> Acked-by: NManuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
- 20 7月, 2007 1 次提交
-
-
由 Magnus Damm 提交于
This patch unifies the cpu specific interrupt setup functions for interrupt controller blocks such as ipr, intc2 and intc. There is no point in having separate functions for each interrupt controller, so let's clean this up. Signed-off-by: NMagnus Damm <damm@igel.co.jp> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
- 15 6月, 2007 2 次提交
-
-
由 Magnus Damm 提交于
This patch reworks the ipr code by grouping the offset array together with the ipr_data structure in a new data structure called ipr_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. This strategy has much in common with the recently merged intc2 code. One logic change has been made - the original ipr code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: NMagnus Damm <damm@igel.co.jp> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
由 Magnus Damm 提交于
The shared intc2 code currently contains cpu-specific #ifdefs. This is a tad unclean and it prevents us from using the shared code to drive board-specific irqs on the se7780 board. This patch reworks the intc2 code by moving the base addresses of the intc2 registers into struct intc2_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. One logic change has been made - the original shared intc2 code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: NMagnus Damm <damm@igel.co.jp> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
- 13 2月, 2007 1 次提交
-
-
由 Manuel Lauss 提交于
Add SH7760 IPR IRQ data; makes 2.6.20-rc bootable again. Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
- 20 10月, 2006 1 次提交
-
-
由 Paul Mundt 提交于
Currently the INTC2 code contains a fixed IRQ table that it iterates through to set the handler type, we move this in to the CPU subtype setup code instead and allow for submitting the table that way. This drops the ST40 tables, as nothing has been happening with those processors, while converting the only existing users to use the new table directly (SH7760 and SH7780). Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
- 27 9月, 2006 1 次提交
-
-
由 Paul Mundt 提交于
This adds some simple setup code for most of the CPU subtypes, primarily simple platform device registration. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-