- 29 5月, 2013 3 次提交
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由 Stephen Warren 提交于
Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties, and some interrupts properties. Use standard GPIO flag defines too. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT files, so that gcc -E handles the entire include tree, and hence any of those files can #include some other file e.g. for constant definitions. This allows future use of #defines and header files in order to define names for various constants, such as the IDs and flags in GPIO specifiers. Use of those features will increase the readability of the device tree files. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 18 5月, 2013 2 次提交
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由 Venu Byravarasu 提交于
This patch updates all Tegra board files so that they contain all the properties required by the updated USB DT binding. Note that this patch only adds the new properties and does not yet remove the old properties, in order to maintain bisectability. The old properties will be removed once the driver has been updated to assume the new bindings. Signed-off-by: NVenu Byravarasu <vbyravarasu@nvidia.com> [swarren: fixed some newly added regulator-name properties to better match schematic, avoided duplicate regulator-name on Whistler.] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Venu Byravarasu 提交于
1. All Tegra20 ULPI reset GPIO DT properties are modified to indicate active low nature of the GPIO. 2. Placed USB PHY DT node immediately below the EHCI controller DT nodes and corrected reg value in the name of USB PHY DT node. Signed-off-by: NVenu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 05 4月, 2013 5 次提交
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由 Prashant Gaikwad 提交于
Correct IDs for cdev1 and cdev2 are 94 and 93 respectively. Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com> [swarren: split into separate driver and device-tree patches] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Joseph Lo 提交于
Adding the PM configuration of PMC when the platform support suspend function. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Joseph Lo 提交于
This patch adds "non-removable" property of MMC host where the eMMC device is for Tegra platform. And the "keep-power-in-suspend" property was used for the SDIO device that need this to go into suspend mode (e.g. BRCM43xx series). Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Joseph Lo 提交于
This adds the power gpio key to DT and enable the wakeup of the gpio key for the device. The Seaboard and paz00 already had the power gpio key binding and the power key of Whistler was on KBC. So these boards' device tree didn't include in this patch. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Audio-related clocks need to be represented in the device tree. Update bindings to describe which clocks are needed, and DT files to include those clocks. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 04 4月, 2013 1 次提交
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由 Joseph Lo 提交于
Adding the bindings of the clock source of PMC in DT. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 12 3月, 2013 1 次提交
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由 Joseph Lo 提交于
The GPIO pin of SD slot card detection should active low. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 29 1月, 2013 4 次提交
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由 Venu Byravarasu 提交于
As reset GPIO information is PHY specific detail, adding it to PHY DT node. Signed-off-by: NVenu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Lucas Stach 提交于
No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is any using any other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files. Signed-off-by: NLucas Stach <dev@lynxeye.de> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Bryan Wu 提交于
Use engineering name 'Tegra20' instead of 'Tegra2' Signed-off-by: NBryan Wu <pengw@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 16 11月, 2012 3 次提交
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由 Thierry Reding 提交于
The Harmony board has an ON Semiconductors NCT1008 temperature sensor connected to the DVC bus. It can be used to monitor the ambient (local) and on-die (remote) temperatures. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Mark Zhang 提交于
Tegra 2's I2C2 controller can be routed to either the PTA or DDC pin group on Ventana. So: - Remove the HDMI function definition of pta pingroup - Define child i2c adapters(ddc & pta) for I2C2 controller Signed-off-by: NMark Zhang <markz@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Wei Ni 提交于
Configure pinmux as required for WiFi. Enable the SDHCI1 controller, which is connectted to the WiFi module. Signed-off-by: NWei Ni <wni@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 06 11月, 2012 1 次提交
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由 Stephen Warren 提交于
Commit 13511def "regulator: deprecate regulator-compatible DT property" now allows for simpler content within the regulators node within a PMIC. Modify all the Tegra device tree files to take advantage of this. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 12 9月, 2012 1 次提交
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由 Stephen Warren 提交于
For Seaboard, Ventana, and Cardhu, add DT property to tell the regulator that it should provide the pm_power_off() implementation. This allows "shutdown" to work. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 07 9月, 2012 1 次提交
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由 Stephen Warren 提交于
Ventana uses a TPS6586x regulator. Instantiate this, and hook up a couple of fixed GPIO-controlled regulators too. The data was chosen to match the PMIC HW defaults, with the following exception: ldo6: The HW default is 2.85v. The schematics are unlabelled. Internal research indicates that 1.8v is correct. Our downstream kernel also uses 1.8v. Portions based on work by Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 21 6月, 2012 1 次提交
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由 Stephen Warren 提交于
Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This change modifies the Tegra board files to be named the same way for consistency. Once a related change is made in U-Boot, this will cause both U-Boot and the kernel to use the same names for the .dts files and SoC identifiers, thus allowing U-Boot's recently added "soc" and "board" environment variables to be used to construct the name of Tegra .dtb files, and hence allow board-generic U-Boot bootcmd scripts to be written. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 12 6月, 2012 1 次提交
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由 Stephen Warren 提交于
The driver supports the new bus-width property, so remove the legacy support-8bit property. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 15 5月, 2012 6 次提交
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由 Arnd Bergmann 提交于
This patch unifies the current DT MMC bindings documentation and code, adds generic MMC DT bindings documentation, and updates .dts files for consistency. [cjb: typo fixes, addition of max-frequency property] Signed-off-by: NChris Ball <cjb@laptop.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Stephen Warren 提交于
In tegra*.dtsi, set status="disable" for all HW modules that the board design may choose not to use. Update all boards to specifically enable any of those modules that are useful by setting status="okay". This makes board files say which features they do use, rather than which they don't, which feels more logical. It also makes the .dts files slightly smaller, at least for existing content. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Sort the nodes according to the following rules: * First, any overrides for properties or nodes created by included files, in the order they appeared in the include file. * Second, any nodes with a reg property, in numerical order. * Third, any nodes without a reg property, in alphabetical order of node name. The second sorting rule at least will probably help if/when we need to explicitly insert nodes for the various busses in Tegra; that will just be an indentation change rather than also a node re-ordering. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Ensure that all Tegraa GPIO specifiers contain a comment indicating which GPIO name the number refers to. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
DT node names only need to include the unit address if it's required to make the node name unique. Remove the unnecessary unit addresses. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Consistently don't place a space after < or before >. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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- 04 5月, 2012 1 次提交
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由 Laxman Dewangan 提交于
Add the device info for ALS and proximity sensor for tegra boards cardhu, ventana and seaboard. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> [swarren: s/PZ02/PZ2/ in .dts files, s/seabridge/seaboard/ in commit description] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 26 4月, 2012 1 次提交
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由 Stephen Warren 提交于
ULPI PHYs have a reset signal, and different boards use a different GPIO for this task. Add a property to device tree to represent this. I'm not sure if adding this property to the EHCI controller node is entirely correct; perhaps eventually we should have explicit separate nodes for the various PHYs. However, we don't have that right now, so this binding seems like a reasonable choice. Cc: <devicetree-discuss@lists.ozlabs.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: <linux-usb@vger.kernel.org> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 19 4月, 2012 1 次提交
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由 Stephen Warren 提交于
This adds a complete pinmux configuration to all Tegra20 device tree files. This allows removal of board-dt-tegra20.c's use of the pinmux board files, and the special device tree handling in board-pinmux.c. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NOlof Johansson <olof@lixom.net>
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- 07 2月, 2012 1 次提交
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由 Stephen Warren 提交于
Add complete bindings to instantiate and configure the codec and top-level audio complex on all currently supported boards using the Tegra+WM8903 audio driver. On those boards, disable the I2S2 controller since it isn't used. On boards not using the WM8903 codec, disable all the audio devices; they can be re-enabled once the relevant codec and ASoC machine drivers have been ported to device-tree. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 08 12月, 2011 5 次提交
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由 Stephen Warren 提交于
Mark any SDHCI controllers that aren't registered by the board files as disabled in the device-tree files. In practice, these controllers: * Have nothing hooked up to them at all, or * For ports intended for SDIO usage, the drivers for anything that might be attached are not in the device-tree yet. If/when drivers appear, the SD/MMC port can be re-enabled. The only possible exception is TrimSlice's mico SD slot, but that wasn't enabled in the board files before anyway, and doesn't work when all the SDHCI controllers are enabled anyway. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Mark any serial ports that aren't registered by the board files as disabled in the device-tree files. In practice, none of the now-disabled ports ended up succeeding device probing because of the missing clock-frequency property. However, explicitly marking the devices disabled has the advantage of squashing the dev_warn() the failed probe causes, and documenting that we intend the port not to be used, rather than accidentally left out the property. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
With board files, all I2C busses run at 400KHz. Fix the device-tree to be consistent with this. It's possible this is incorrect, but at least it keeps the board files and device-tree consistent. Also, disable any I2C controllers that the board files don't register, also for consistency. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
The command-lines present in the existing /chosen node are not necessarily correct for all users. Ideally, we should simply use the command-line supplied by the boot-loader. In fact, using the boot-loader's cmdline is quite easy; either the bootloader fully supports DT, in which case it can modify the DT passed to the kernel to include its command-line, or CONFIG_APPENDED_DTB can be used in conjunction with CONFIG_ARM_ATAG_DTB_COMPAT, and the kernel will substitute the bootloader's command-line into the DT. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
There are no drivers in the kernel at present which can make use of the memory reserved by /memreserve/, so there is no point reserving it. Remove /memreserve/ to allow the user more memory. It's also unclear whether any future driver would actually require /memreserve/, or allocate memory through some other mechanism. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 10 11月, 2011 1 次提交
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由 Stephen Warren 提交于
Ventana uses the same SDHCI GPIOs as Seaboard; PI6 (70) is the power GPIO for the SD port, and there is no power GPIO for the MMC chip. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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