- 20 12月, 2013 5 次提交
-
-
由 Dan Carpenter 提交于
If we don't have enough memory for ->planes then we leak "fb". Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
A lot of the modern userspace is capable of working without the legacy fbdev support. kmscon can be used as a replacement for the framebuffer console, and KMS X drivers create their own framebuffers. Most people don't have a system where all of this works yet, though, so leave support enabled by default. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
Move the TEGRA_HOST1X and DRM_KMS_HELPER entries around to keep the list sorted. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Wei Yongjun 提交于
In case of error, the devm_ioremap_resource() function returns ERR_PTR() and never NULL. The NULL test in the return value check should therefore be replaced with IS_ERR(). Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
This commit adds support for both DSI outputs found on Tegra. Only very minimal functionality is implemented, so advanced features like ganged mode won't work. Due to the lack of other test hardware, some sections of the driver are hardcoded to work with Dalmore. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
- 19 12月, 2013 15 次提交
-
-
由 Thierry Reding 提交于
When an output is disabled, its DPMS mode is usually set to off. Instead of only disabling the panel (if one is attached), turn the output off entirely to save more power. HDMI doesn't have any panels attached, so it previously didn't save any power at all. With this commit, however, the complete HDMI interface will be turned off, therefore allowing an attached monitor to go into a standby mode. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
The DRM core doesn't track enable and disable state of encoders and/or connectors, so calls to the output's .enable() and .disable() are not guaranteed to be balanced. Track the enable state internally so that calls to regulator and clock frameworks remain balanced. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
The correct check is for 48 kHz, not 480 kHz. Found by Coverity. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
These buffer object operations are never used outside of the GEM implementation so there is no use in exporting them. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
The ARCH_MULTIPLATFORM dependency was introduced back when Tegra didn't support multiplatform yet as a means to allow the driver to be easily compile-tested along with other DRM drivers. In the meantime, the new COMPILE_TEST Kconfig option has been introduced for exactly that purpose, so use that instead to clarify the intention. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
All APIs that the driver uses are exported, so the driver can now be built as a module. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
Tegra124 has 192 syncpoints whereas its predecessors had 32 syncpoints. This required changes to the hardware register layout. Signed-off-by: NArto Merilainen <amerilainen@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Paul Walmsley 提交于
Treat both negative and zero return values from clk_round_rate() as errors. This is needed since subsequent patches will convert clk_round_rate()'s return value to be an unsigned type, rather than a signed type, since some clock sources can generate rates higher than (2^31)-1 Hz. Eventually, when calling clk_round_rate(), only a return value of zero will be considered a error. All other values will be considered valid rates. The comparison against values less than 0 is kept to preserve the correct behavior in the meantime. Signed-off-by: NPaul Walmsley <pwalmsley@nvidia.com> Cc: Mikko Perttunen <mperttunen@nvidia.com> Cc: Arto Merilainen <amerilainen@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Terje Bergström <tbergstrom@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
When debugfs support isn't enabled, gcc complains about some variables being unused. To avoid further #ifdefery, move debugfs specific setup code into static functions and use IS_ENABLED(CONFIG_DEBUG_FS) to have the compiler, rather than the preprocessor, discard them when unused. The advantage of doing it this way is that all the code will be compile-tested whether or not debugfs support is enabled. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
The ARCH_MULTIPLATFORM dependency was introduced back when Tegra didn't support multiplatform yet as a means to allow the driver to be easily compile-tested along with other DRM drivers. In the meantime, the new COMPILE_TEST Kconfig option has been introduced for exactly that purpose, so use that instead to clarify the intention. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
Include the linux/host1x.h and dev.h headers so that function prototypes are visible to keep sparse from suggesting that their implementations be made static. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
An earlier patch added a subset of the required HW specific header files but didn't actually include the right ones when compiling for host1x02. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
Make the public API symbols visible so that depending drivers can be built as a module. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
This driver adds support to perform calibration of the MIPI pads for CSI and DSI. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
- 18 12月, 2013 11 次提交
-
-
由 Thierry Reding 提交于
Introduce device tree bindings for the MIPI pad calibration controller found on Tegra SoCs. The controller can be used to perform calibration of pads used for DSI and CSI peripherals. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
The display controller primary clock was recently renamed to "dc", so update the example to reflect that. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
Use the DRM panel framework to attach a panel to an output. If the panel attached to a connector supports supports the backlight brightness accessors, a property will be available to allow the brightness to be modified from userspace. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
The Panasonic VVX10F004B0 is a 10.1" WUXGA TFT LCD panel connected using four DSI lanes. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
Add a driver for simple panels. Such panels can have a regulator that provides the supply voltage and a separate GPIO to enable the panel. Optionally the panels can have a backlight associated with them so it can be enabled or disabled according to the panel's power management mode. Support is added for two panels: An AU Optronics 10.1" WSVGA and a Chunghwa Picture Tubes 10.1" WXGA panel. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
Add a very simple framework to register and lookup panels. Panel drivers can initialize a DRM panel and register it with the framework, allowing them to be retrieved and used by display drivers. Currently only support for DPMS and obtaining panel modes is provided. However it should be sufficient to enable a large number of panels. The framework should also be easily extensible to support more sophisticated kinds of panels such as DSI. The framework hasn't been tied into the DRM core, even though it should be easily possible to do so if that's what we want. In the current implementation, display drivers can simple make use of it to retrieve a panel, obtain its modes and control its DPMS mode. Note that this is currently only tested on systems that boot from a device tree. No glue code has been written yet for systems that use platform data, but it should be easy to add. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Andrzej Hajda 提交于
MIPI DSI bus allows to model DSI hosts and DSI peripherals using the Linux driver model. DSI hosts are registered by the DSI host drivers. During registration DSI peripherals will be created from the children of the DSI host's device tree node. Support for registration from board-setup code will be added later when needed. DSI hosts expose operations which can be used by DSI peripheral drivers to access associated devices. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
This binding specifies a set of common properties for display panels. It can be used as a basis by bindings for specific panels. Bindings for three specific panels are provided to show how the simple panel binding can be used. Acked-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
Document the device tree bindings for the MIPI DSI bus. The MIPI Display Serial Interface specifies a serial bus and a protocol for communication between a host and up to four peripherals. Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
ARM: tegra: powergate driver changes This branch includes all the changes to Tegra's powergate driver for 3.14. These are separate out, since the Tegra DRM changes for 3.14 rely on the new APIs introduced here. A few cleanups and fixes are included, plus additions of Tegra124 SoC support, and a new API for manipulating Tegra's IO rail deep power down states. This branch is based on tag tegra-for-3.14-dmas-resets-rework, in order to avoid conflicts with the addition of common reset controller support to the powergate driver.
-
由 Thierry Reding 提交于
ARM: tegra: implement common DMA and resets DT bindings This series converts the Tegra DTs and drivers to use the common/ standard DMA and reset bindings, rather than custom bindings. It also adds complete documentation for the Tegra clock bindings without actually changing any binding definitions. This conversion relies on a few sets of patches in branches from outside the Tegra tree: 1) A patch to add an DMA channel request API which allows deferred probe to be implemented. 2) A patch to implement a common part of the of_xlate function for DMA controllers. 3) Some ASoC patches (which in turn rely on (1) above), which support deferred probe during DMA channel allocation. 4) The Tegra clock driver changes for 3.14. Consequently, this branch is based on a merge of all of those external branches. In turn, this branch is or will be pulled into a few places that either rely on features introduced here, or would otherwise conflict with the patches: a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid conflicts. b) The DRM tree, which introduces new code that relies on the reset controller framework introduced in this branch, and to avoid conflicts.
-
- 17 12月, 2013 8 次提交
-
-
由 Thierry Reding 提交于
Add tegra_io_rail_power_off() and tegra_io_rail_power_on() functions to put IO rails into or out of deep powerdown mode, respectively. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
由 Thierry Reding 提交于
A separate register is used to remove the clamps for the GPU on Tegra124. In order to be able to use the same API, special-case this particular partition. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
由 Thierry Reding 提交于
Three new gates have been added for Tegra124: SOR, VIC and IRAM. In addition, PCIe and SATA gates are again supported, like on Tegra20 and Tegra30. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
由 Thierry Reding 提交于
Drivers can use the tegra_powergate_remove_clamping() API during initialization. In order to allow such drivers to be built as modules, export the symbol. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
由 Thierry Reding 提交于
This function can be used by drivers, which in turn may be built as modules. Export the symbol so it is available to modules. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
由 Thierry Reding 提交于
This matches the name of the powergate as listed in the TRM. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
由 Thierry Reding 提交于
Some of the powergate code uses unusual spacing around == and has a tab instead of a space before an opening parenthesis. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
由 Dan Carpenter 提交于
dma_request_slave_channel() returns NULL on error and not ERR_PTRs. I've fixed this by using dma_request_slave_channel_reason() which does return ERR_PTRs. Fixes: a915d150 ('spi: tegra: convert to standard DMA DT bindings') Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
- 16 12月, 2013 1 次提交
-
-
由 Linus Torvalds 提交于
-