This patch adds a sample DT-based APE6EVM "reference" implementation. The
use of platform-specific C-code should be avoided with this configuration
as much as possible.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add a DT reference implementation for the KZM9D board.

Only DT devices are used in this case. UART, STI, GPIO
and SMP / GIC are all provided by emev2.dtsi.

There is still a board specific C file used for enabling
legacy SH clocks. This file will be removed after we have
moved over to common clocks.
Signed-off-by: NMagnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au: Do not include trailing blank line in
 board-kzm9d-reference.c ]
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Remove board support for the r8a7740 based Bonito board

The r8a7740 SoC support code is still kept around since it
is in use by the Armadillo800eva board which is basically a more
recent board where the design is based on Bonito.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Remove board support for the sh7372 based AP4EVB board

The sh7372 SoC support code is still kept around since it
is in use by the Mackerel board which is basically a more
recent board where the design is based on AP4EVB.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Provide alternate board code for the Armadillo800EVA to demonstrate how
DT may be used given the current state of driver device tree support.
This is intended to act as a reference for mach-shmobile developers.

This a rather bare bone version with the following devices supported:

 - GIC
 - irqpins
 - i2c0/1
 - touchscreen
Signed-off-by: NBastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Lager base board support making use of 2 GiB of memory,
the r8a7790 SoC with the SCIF0 serial port and CA15 with
ARM architected timer.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

V3 of APE6EVM base board support making use of
1 GiB of memory, the SCIFA0 serial port and
ARM architected timer.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add basic Bock-W board support

More devices will be added on top of this patch after
PICNTRL and clock framework are in better shape.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add initial support for the r8a7790 SoC including:
 - Single Cortex-A15 CPU Core
 - GIC
 - Architecture timer

No static virtual mappings are used, all the components
make use of ioremap(). DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add initial support for the R8A7778 R-Car M1A SoC.
No static virtual mappings are used, all the components
make use of ioremap().
DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.

It is based on v1.0 datasheet
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

V3 of initial support for the r8a73a4 SoC including:
 - Single Cortex-A15 CPU Core
 - GIC
 - Architecture timer

No static virtual mappings are used, all the components
make use of ioremap(). DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Provide alternate board code for the kzm9g to demonstrate
how DT may be used given the current state of driver
device tree support. This is intended to act as a reference
for mach-shmobile developers.

Some notes:

* Brings up the GIC interrupt handler using device tree
* Brings up the following device using device tree:
  - MMCIF (MMC)
* Does not bring up the INTC interrupt controller at all,
  thus external devices may not be used. In particular,
  the SMSC ethernet device may not be used and thus
  NFS root may not be used.
* Uses existing C code and not device tree to initialise the following,
  which are needed for a working board:
  - SCIF (Serial)
  - CMT (Clock)
  - PFC (GPIO)

To use this alternate board code instead of the normal board code,
CONFIG_MACH_KZM9G_REFERENCE should be selected in the kernel config.
And the sh73a0-kzm9g-reference.dtb flattened device tree blob should be used.

Includes fix by Thierry Reding to no longer use gic_handle_irq()

Includes fixes by Guennadi Liakhovetski for recent pinmux changes.

Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Provide alternate board code for the marzen to demonstrate
how DT may be used given the current state of driver
device tree support. This is intended to act as a reference
for mach-shmobile developers.
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Each CPU Hotplug implementation for mach-shmobile
is now self-contained, so this change removes unused
helper code in hotplug.c. The two CPU Hotplug capable
SoCs sh73a0 and r8a7779 remain unchanged.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Update the code in headsmp-scu.S to use a global
shmobile_scu_base variable both for convenient SCU
base address storage and for the early SCU setup
code in shmobile_secondary_vector_scu.

With this patch applied r8a7779, sh73a0 and EMEV2
all make use of the global shmobile_scu_base
variable. However only sh73a0 makes use of the SCU
bring up code in shmobile_secondary_vector_scu.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Rename headsmp-sh73a0.S into headsmp-scu.S and
introduce shmobile_secondary_vector_scu().

The goal is to be able to share the function
above between all mach-shmobile SoCs that use
SCU for SMP. So far only sh73a0 use this.

At this time the SCU base address is still hard
coded in headsmp-scu.S to 0xf0000000, but this
will be changed in the future.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

When booting secondary CPUs we have used the main CPU to set up the
Snoop Control Unit flags of these CPUs. It is a cleaner approach
if every CPU takes care of its own flags. We avoid the need for
locking and the program logic is more concise. With this patch the file
headsmp-sh73a0.S is added that contains a startup vector for secondary CPUs
that sets up its own SCU flags.
Further in sh73a0_smp_prepare_cpus() we can rely on the generic ARM helper
scu_power_mode(). This is possible as we don't cross borders anymore (every
CPU handles its own flags) and need no locking. So we can throw out the
needless function modify_scu_cpu_psr().
Signed-off-by: NBastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add the lighest possible sleep mode on Cortex-A9 cores: CPU sleep. It is
entered by a simple dsb and wfi instruction via cpu_do_idle(). As just
clocks are stopped there is no need to save or restore any state of the
system.
Signed-off-by: NBastian Hecht <hechtb+renesas@gmail.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Pinmux info for the sh73a0 is now provided by pinmux drivers. Remove the
duplicate copy in arch code.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Pinmux info for the sh7372 is now provided by pinmux drivers. Remove the
duplicate copy in arch code.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Pinmux info for the r8a7779 is now provided by pinmux drivers. Remove
the duplicate copy in arch code.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Pinmux info for the r8a7740 is now provided by pinmux drivers. Remove
the duplicate copy in arch code.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This is old CPU of shmobile, and the machine by which this CPU is
used cannot be obtained.
Therefore, remove SH7377 support.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: NSimon Horman <horms@verge.net.au>

This is old CPU of shmobile, and the machine by which this CPU is
used cannot be obtained.
Therefore, remove SH7367 support.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: NSimon Horman <horms@verge.net.au>

This machine is using old CPU of shmobile (sh7377) and cannot obtain
machine, either.
Therefore, remove G4EVM support.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: NSimon Horman <horms@verge.net.au>

This machine is using old CPU of shmobile (SH7367) and cannot obtain
machine, either.
Therefore, remove G3EVM support.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: NSimon Horman <horms@verge.net.au>

The role of the only function in the common.c file in
arch/arm/mach-shmobile, shmobile_init_late(), is to call two
initializers whose definitions depend on kernel configuration
options.  Those initializers may very well be called from a static
inline function in arm/mach-shmobile/include/mach/common.h,
though, in which makes the code a bit easier to read.  Moreover,
the common.c may be dropped entirely then.
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
Acked-by: NMagnus Damm <damm@opensource.se>

This patch adds basic A4S pm domain support.
Now, below devices can be controled by PM

Common-SHwy, Common-HPB, BSC, MFI, MMFROM, HS-SHwy,
SYS-HPB, INTCA, DBSC, DDRPHY (Logic),
ATAPI, GbEther, AXI-bus
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This patch adds Renesas R-mobile series common PM domain APIs.
R-mobile CPU can use/switch this API
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This is V3 of Emma Mobile EV2 SMP support.

At this point only the most basic form of SMP operation
is supported. TWD and CPU Hotplug support is excluded.

Tied to both the Emma Mobile EV2 and the KZM9D board
due to the need to switch on board in platsmp.c and
the newly introduced need for static mappings.

The static mappings are needed to allow hardware
acces early during boot when SMP is initialized.
This early requirement forces us to also map in
the SMU registers.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

V3 of basic KZM9D board support. At this point a quite
thin layer that makes use of the Emma Mobile EV2 SoC code.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This is V3 of the Emma Mobile EV2 SoC support.
Included here is support for serial and timer
devices which is just about enough to boot a kernel.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This adds very basic KZM-A9-GT board (SH73a0) support
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This adds very basic armadillo800eva board (R-Mobile A1) support
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NMagnus Damm <damm@opensource.se>
Acked-by: N"Rafael J. Wysocki" <rjw@sisk.pl>

Add support for the new smp_twd runtime registration interface
to the shmobile platforms, and remove the old compile-time support.

Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

This patch contains r8a7779 SMP support V3 - now including
CPU hotplug offine and online support. The r8a7779 power
domain code is tied together with SMP glue code which allows
us to control the power domains via CPU hotplug.

At this point the kernel boots with the 4 Cortex-A9 cores in
SMP mode and all CPU cores except CPU0 can be hotplugged.

The code in platsmp.c is quite far from pretty, but it is
kept like that intentionally to avoid creating layers of
code that will go away in the near future anyway. The code
needs to be updated when some per-SoC handling code will be
added to the ARM architecture, see the following patch for
more information:
 "[RFC PATCH 0/3] Per SoC descriptor"
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add power domain control support for the r8a7779 SoC V2.

This adds support for 4 power domains for I/O Devices
together with code that can be used for CPU cores as well.

The only out of the ordinary experience is the need for
ioremap() of SYSC registers. Because of that we need to
execute some init function before setting up the domains.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add GPIO-only r8a7779 PFC support V2.

Only regular GPIOs are supported at this time. GPIO_FN are not
supported because they require variable bit width support in be
the shared pfc code.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Initial support for the r8a7779 SoC and the Marzen board (V2).

Only SCIF ports and the TMU are supported at this point.

To keep things simple only entity-mapped virt-to-phys mappings
are supported. This forces drivers and other SoC glue code to
make use of ioremap(). We cannot support early serial console
due to virtual address space collisions with the ARM kernel.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>