- 01 10月, 2015 1 次提交
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由 Marc Zyngier 提交于
Seeing the 'of' characters in a symbol that is being called from ACPI seems to freak out people. So let's do a bit of pointless renaming so that these folks do feel at home. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Reviewed-by: NHanjun Guo <hanjun.guo@linaro.org> Acked-by: NThomas Gleixner <tglx@linutronix.de> Tested-by: NHanjun Guo <hanjun.guo@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 02 9月, 2015 1 次提交
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由 Tony Lindgren 提交于
When bringing up a new SoC we needlessly prevent booting at timer init if timer clock_set_parent fails. This can fail if the system is booting on bootloader configured PLL values until the clock framework driver for the PLL is implemented. Let's just WARN instead, this will provide helpful information for anybody bringing up a new SoC what needs to be fixed. This allows to boot dm814x that's still missing the PLL driver. Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 17 7月, 2015 1 次提交
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由 Viresh Kumar 提交于
Migrate omap2 driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. Acked-by: NSantosh Shilimkar <ssantosh@kernel.org> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
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- 16 7月, 2015 2 次提交
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由 Tony Lindgren 提交于
Inspired by a patch from Felipe Balbi <balbi@ti.com>, we can now get rid of most the code in omap4_local_timer_init. Omap4 is now device tree only.. And we have not properly supported omap4 ES1.0 revision for a really long time AFAIK. Let's just remove all that code to simplify things. This assumes we have arm,cortex-a9-twd-timer entry in the omap4.dtsi file, which we do. Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Markus Elfring 提交于
The of_node_put() function tests whether its argument is NULL and then returns immediately if so. Furthermore, the kerneldoc for of_node_put() explicitly supports passing in a NULL pointer as its argument. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: NMarkus Elfring <elfring@users.sourceforge.net> [paul@pwsan.com: dropped the omap_device.c and omap_hwmod.c changes for now, edited the commit message accordingly and to note the documented "contract"] Reviewed-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 12 5月, 2015 1 次提交
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由 Tony Lindgren 提交于
With recent changes to use determine_rate, the comparison of two clocks won't work without clk_is_match that does __clk_get_hw on the clocks first. As we've been unconditionally already calling clk_set_parent already because of the bogus comparison, let's just remove the check as suggested by Stephen Boyd <sboyd@codeaurora.org>. Cc: Michael Turquette <mturquette@linaro.org> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 1月, 2015 1 次提交
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由 Tony Lindgren 提交于
Fix dm814 and dm816 clocks and timer init. Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 06 1月, 2015 2 次提交
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由 Lennart Sorensen 提交于
Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external crystal is not enabled at power up. Instead the CPU falls back to using an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is usually 20MHz on boards so far (which gives an emulated frequency of 32.786KHz), but can also be 19.2 or 27MHz which result in much larger drift. Since this is used to drive the master counter at 32.768KHz * 375 / 2 = 6.144MHz, the emulated speed for 20MHz is of by 570ppm, or about 43 seconds per day, and more than the 500ppm NTP is able to tolerate. Checking the CTRL_CORE_BOOTSTRAP register can determine if the CPU is using the real 32.768KHz crystal or the emulated SYSCLK1/610, and by known that the real counter frequency can be determined and used. The real speed is then SYSCLK1 / 610 * 375 / 2 or SYSCLK1 * 75 / 244. Signed-off-by: NLen Sorensen <lsorense@csclub.uwaterloo.ca> Tested-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Lennart Sorensen 提交于
The switch statement of the possible list of SYSCLK1 frequencies is missing a 0 in 4 out of the 7 frequencies. Fixes: fa6d79d2 ("ARM: OMAP: Add initialisation for the real-time counter") Cc: stable@vger.kernel.org # v3.7+ Signed-off-by: NLen Sorensen <lsorense@csclub.uwaterloo.ca> Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com> Acked-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 12 9月, 2014 1 次提交
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由 Uwe Kleine-König 提交于
of_device_ids (i.e. compatible strings and the respective data) are not supposed to change at runtime. All functions working with of_device_ids provided by <linux/of.h> work with const of_device_ids. So mark the non-const function parameters and structs for OMAP2+ as const, too. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 08 5月, 2014 1 次提交
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由 Victor Kamensky 提交于
All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: NVictor Kamensky <victor.kamensky@linaro.org> Signed-off-by: NTaras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 06 5月, 2014 1 次提交
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由 Oussama Ghorbel 提交于
The variable use_gptimer_clksrc is only used by two __init functions, So we can freely free it after boot. Signed-off-by: NOussama Ghorbel <ghorbel@pivasoftware.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 01 3月, 2014 1 次提交
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由 Rajendra Nayak 提交于
The SyncTimer in AM43x is clocked using the following two sources: 1) An inaccuarte 32k clock (CLK_32KHZ) derived from PER DPLL, causing system time to go slowly (~10% deviation). 2) external 32KHz RTC clock, which may not always be available on board like in the case of ePOS EVM Use gptimer as clocksource instead, as is done in the case of AM335x (which does not have a SyncTimer). With this, system time keeping works accurately. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 18 1月, 2014 1 次提交
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由 Tero Kristo 提交于
clk_init is now separated to a common function which gets called for all SoC:s, which initializes the DT clocks and calls the SoC specific clock init. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 22 11月, 2013 1 次提交
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由 Stephen Boyd 提交于
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Acked-by: Santosh Shilimkar<santosh.shilimkar@ti.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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- 12 10月, 2013 1 次提交
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由 Tony Lindgren 提交于
Otherwise we can get an error with some configs: arch/arm/mach-omap2/timer.c:73: undefined reference to `omap_smc1' Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 11 10月, 2013 1 次提交
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由 R Sricharan 提交于
The realtime counter called master counter, produces the count used by the private timer peripherals in the MPU_CLUSTER. The CNTFRQ per cpu register is used to denote the frequency of the counter. Currently the frequency value is passed from the DT file, but this is not scalable when we have other non-DT guest OS. This register must be set to the right value by the secure rom code. Setting this register helps in propagating the right frequency value across OSes. More discussions and the reason for adding this in a non-DT way can be seen from below. http://www.mail-archive.com/linux-omap@vger.kernel.org/msg93832.html So configuring this secure register for all the cpus here. Cc: Nishanth Menon <nm@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Tested-by: NNishanth Menon <nm@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NSricharan R <r.sricharan@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 09 10月, 2013 2 次提交
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由 Sricharan R 提交于
The real time counter also called master counter, is a free-running counter. It produces the count used by the CPU local timer peripherals in the MPU cluster. The timer counts at a rate of 6.144 MHz. The ratio registers are missing for a sys-clk of 20MHZ which is used by DRA7 socs. So because of this, the counter was getting wrongly programmed for a sys-clk of 38.4Mhz(default). So adding the ratio registers for 20MHZ sys-clk. Tested-by: NNishanth Menon <nm@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NSricharan R <r.sricharan@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Simon Barth 提交于
Since dra7 reuses the function 'omap5_realtime_timer_init' in arch/arm/mach-omap2/board-generic.c as timer init function, it has to be built for this SoC as well. Signed-off-by: NSimon Barth <Simon.Pe.Barth@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 04 10月, 2013 1 次提交
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由 Michael Opdenacker 提交于
This patch proposes to remove the IRQF_DISABLED flag from OMAP code It's a NOOP since 2.6.35, and will be removed one day. Signed-off-by: NMichael Opdenacker <michael.opdenacker@free-electrons.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 21 8月, 2013 1 次提交
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由 Chen Baozi 提交于
The denominator should be load from INCREMENTOR_DENUMERATOR_RELOAD_OFFSET rather than INCREMENTER_NUMERATOR_OFFSET. This is more likely a typo, since INCREMENTER_DENUMERATOR_RELOAD[23:17] is reserved. It seems that it won't make much trouble without this fix, because the useful [11:0] bits are mask and set the right value. Anyway, reading from a right address is better choice. Signed-off-by: NChen Baozi <baozich@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 13 8月, 2013 1 次提交
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由 R Sricharan 提交于
All of OMAP5 timer support for clocksource and clockevent is completely reused across DRA7. Signed-off-by: NR Sricharan <r.sricharan@ti.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com>
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- 03 8月, 2013 1 次提交
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由 Stephen Boyd 提交于
A recent patch ef3160cd (ARM: OMAP2+: Divorce from local timer API, 2013-03-04) broke the omap build when SMP=n because the TWD functions are only compiled on SMP=y builds. Stub out the TWD calls when the TWD isn't built in to to keep everything building. arch/arm/mach-omap2/built-in.o: In function `omap4_local_timer_init': dss-common.c:(.init.text+0x1d90): undefined reference to `twd_local_timer_register' Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 04 7月, 2013 1 次提交
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由 Afzal Mohammed 提交于
of_property_read_string_index(...,&oh_name) in omap_dm_timer_init_one does not alter the value of 'oh_name' even if the relevant function fails and as 'oh_name' in stack may have a non-zero value, it would be misunderstood by timer code that DT has specified "ti,hwmod" property for timer. 'oh_name' in this scenario would be a junk value, this would result in module not being enabled by hwmod API's for timer, and in turn crash. Signed-off-by: NAfzal Mohammed <afzal@ti.com> Acked-by: NJon Hunter <jgchunter@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 25 6月, 2013 1 次提交
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由 Stephen Boyd 提交于
Now that the TWD doesn't rely on the local timer API, OMAP can stop selecting it in Kconfig and relying on the config option to decide if it should call smp_twd functions. Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 13 6月, 2013 2 次提交
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由 Afzal Mohammed 提交于
Describe minimal DT boot machine details for AM43x based SoC's. AM43x SoC's are ARM Cortex-A9 based with one core. AM43x is similar to AM335x w.r.t L4 PER/WKUP memory map. AM43x has a sync timer, here that is being used as clocksource, while 1ms dmtimer as clockevent. Signed-off-by: NAnkur Kishore <a-kishore@ti.com> Signed-off-by: NAfzal Mohammed <afzal@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Stephen Boyd 提交于
Nothing about the sched_clock implementation in the ARM port is specific to the architecture. Generalize the code so that other architectures can use it by selecting GENERIC_SCHED_CLOCK. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> [jstultz: Merge minor collisions with other patches in my tree] Signed-off-by: NJohn Stultz <john.stultz@linaro.org>
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- 08 5月, 2013 1 次提交
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由 Linus Torvalds 提交于
I badly screwed up the merge in commit 6fa52ed3 ("Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/.../arm-soc") by incorrectly taking the arch/arm/mach-omap2/* data fully from the merge target because the 'drivers-for-linus' branch seemed to be a proper superset of the duplicate ARM commits. That was bogus: commit ff931c82 ("ARM: OMAP: clocks: Delay clk inits atleast until slab is initialized") only existed in head, and the changes to arch/arm/mach-omap2/timer.c from that commit got list. Re-doing the merge more carefully, I do think this part was the only thing I screwed up. Knock wood. Reported-by: NTony Lindgren <tony@atomide.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 07 5月, 2013 1 次提交
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由 Vaibhav Hiremath 提交于
Looks like the timer.c fixes in commit ff931c82 (ARM: OMAP: clocks: Delay clk inits atleast until slab is initialized) got lost in a merge with da4a686a (ARM: smp_twd: convert to use CLKSRC_OF init). Without the omap_clk_init() calls none of OMAP family of devices boot. Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> [tony@atomide.com: updated comments to describe merge error] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 03 5月, 2013 1 次提交
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由 Russell King 提交于
Consistently check errors using the usual method used in the kernel for much of its history. For instance: int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) { int div; div = gpmc_calc_divider(t->sync_clk); if (div < 0) return div; static int gpmc_set_async_mode(int cs, struct gpmc_timings *t) { ... return gpmc_cs_set_timings(cs, t); ..... ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t); if (IS_ERR_VALUE(ret)) return ret; So, gpmc_cs_set_timings() thinks any negative return value is an error, but where we check that in higher levels, only a limited range are errors... There is only _one_ use of IS_ERR_VALUE() in arch/arm which is really appropriate, and that is in arch/arm/include/asm/syscall.h: static inline long syscall_get_error(struct task_struct *task, struct pt_regs *regs) { unsigned long error = regs->ARM_r0; return IS_ERR_VALUE(error) ? error : 0; } because this function really does have to differentiate between error return values and addresses which look like negative numbers (eg, from mmap()). So, here's a patch to remove them from OMAP, except for the above. Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 24 4月, 2013 1 次提交
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由 Arnd Bergmann 提交于
Commit 0583fe47 "ARM: convert arm/arm64 arch timer to use CLKSRC_OF init" has left the omap5_realtime_timer_init() function with a stale variable and broken whitespace. This fixes both. Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 12 4月, 2013 1 次提交
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由 Rob Herring 提交于
This converts arm and arm64 to use CLKSRC_OF DT based initialization for the arch timer. A new function arch_timer_arch_init is added to allow for arch specific setup. This has a side effect of enabling sched_clock on omap5 and exynos5. There should not be any reason not to use the arch timers for sched_clock. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Simon Horman <horms@verge.net.au> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-samsung-soc@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: linux-sh@vger.kernel.org Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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- 09 4月, 2013 1 次提交
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由 Jon Hunter 提交于
Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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- 02 4月, 2013 7 次提交
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由 Jon Hunter 提交于
Commit 6bb27d73 (ARM: delete struct sys_timer) changed the function created by the macro OMAP_SYS_32K_TIMER_INIT from static void to void. For OMAP4+ devices this created the following sparse warning ... arch/arm/mach-omap2/timer.c:585:1: warning: symbol 'omap4_sync32k_timer_init' was not declared. Should it be static? The function omap4_sync32k_timer_init() is not referenced outside of the file timer.c and so make this function static. Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Jon Hunter 提交于
Currently, the timer ID is being passed to the function omap_dm_timer_init_one(). Instead of passing the ID separately, store it in the omap_dm_timer structure, that is also passed, and access the ID from this structure. Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Jon Hunter 提交于
When booting with device-tree for OMAP3 and AM335x devices and a gptimer is used as the clocksource (which is always the case for AM335x), a gptimer located in a power domain that is not always-on is selected. Ideally we should use a gptimer for clocksource that is located in a power domain that is always on (such as the wake-up domain) so that time can be maintained during a kernel suspend without keeping on additional power domains unnecessarily. In order to fix this so that we can select a gptimer located in a power domain that is always-on, the following changes were made ... 1. Currently, only when selecting a gptimer to use for a clockevent timer, do we pass a timer property that can be used to select a specific gptimer. Change this so that we can pass a property when selecting a gptimer to use for a clocksource timer too. 2. Currently, when selecting either a gptimer to use for a clockevent timer or a clocksource timer and no timer property is passed, then the first available timer is selected regardless of the properties it has. Change this so that if no properties are passed, then a timer that does not have additional features (such as always-on, dsp-irq, pwm, and secure) is selected. For OMAP3 and AM335x devices that use a gptimer for clocksource, change the selection of the gptimer so that by default the gptimer located in the always-on power domain is used for clocksource instead of clockevents. Please note that using a gptimer for both clocksource and clockevents can have a system power impact during idle. The reason being is that OMAP and AMxxx devices typically only have one gptimer in a power domain that is always-on. Therefore when the kernel is idle both the clocksource and clockevent timers will be active and this will keep additional power domains on. During kernel suspend, only the clocksource timer is active and therefore, it is better to use a gptimer in a power domain that is always-on for clocksource. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
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由 Jon Hunter 提交于
There is a lot of redundancy in the definitions for the various system timers for OMAP2+ devices. For example, the omap3_am33xx_gptimer_timer_init() function is the same as the omap3_gp_gptimer_timer_init() function and the function omap4_sync32k_timer_init() can be re-used for OMAP5 devices. Therefore, consolidate the definitions to simplify the code. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
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由 Jon Hunter 提交于
In commit c59b537d (ARM: OMAP2+: Simplify dmtimer clock aliases), new clock aliases for dmtimers were added to simplify the code. These clock aliases can also be used when configuring the system timers and allow us to remove the current definitions, simplifying the code. Please note that for OMAP4/5 devices (unlike OMAP2/3 devices), there is no clock alias for "timer_sys_ck" with NULL as the device name. Therefore we still need to use the alias "sys_clkin_ck" for these devices. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Jon Hunter 提交于
Currently, when configuring the clock-events and clock-source timers for OMAP2+ devices, we check whether the timer ID is 12 before attempting to set the parent clock for the timer. This test was added for OMAP3 general purpose devices (no security features enabled) that a 12th timer available but unlike the other timers only has a single functional clock source. Calling clk_set_parent() for this 12th timer would always return an error because there is only one choice for a parent clock. Therefore, this hard-coded timer ID test was added. To avoid this timer ID test, simply check to see if the timer's current parent clock is the desired parent clock and only call clk_set_parent() if this is not the case. Also if clk_get() fails, then use PTR_ERR() to return the error code. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Jon Hunter 提交于
Currently on boot, when displaying the name of the gptimer used for clockevents and clocksource timers, the timer ID is shown. However, when booting with device-tree, the timer ID is not used to select a gptimer but a timer property. Hence, it is possible that the timer selected when booting with device-tree does not match the ID shown. Therefore, instead display the HWMOD name of the gptimer and use the HWMOD name as the name of clockevent and clocksource timer (if a gptimer is used). Signed-off-by: NJon Hunter <jon-hunter@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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