- 11 8月, 2010 2 次提交
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由 Linus Walleij 提交于
This removes the quirks to clock the U300 VIC and timer by custom hooks and moves the control out to the clock framework where it belongs. This is possible now that clocks are available early. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Linus Walleij 提交于
This fixes a regression due to the new apb_pclk stuff in the U300 platform, makes it run by splitting the apb clock off the single UART clocks. For the MMCI and PL022 clocks we don't split them: these are actually hardwired to the same clock terminal and will thus simply have a double reference count and will be referenced twice. We also move clock registration to .init_irq() so they are available early enough for probing to be successful and remove the earlier quirk to clock primecells during PrimeCell registration. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 29 4月, 2009 1 次提交
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由 Linus Walleij 提交于
This adds the clocking framework and hooks into the clkdevice for U300 series platforms. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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