The count member of davinci_spi is internal to the driver and
is not shared with framework. Eliminate its unnecessary update.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

The struct davinci_spi_slave has a single member. Eliminate it
and store the per-chipselect data in struct davinci_spi directly.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Several members of struct davinci_spi_slave are unused in code.
Remove such members.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Just enabling WAITENA in SPIFMTn register waits for the
enable signal from the slave indefinitely. Allow support
for finite waiting by adding support for c2e delay
(maximum time for addressed slave to respond) and t2e
delay (maximum time for slave to respond after transmit
data finished).

While at it, modify the T2C and C2T defines by prepending
the register name as is the convention followed for other
register field elsewhere in the driver.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Setup chip-select timers values only if timer is enabled
(timer_disbled in spi configuration is false).

As a nice side effect, this patch removes code duplicated in
davinci_spi_bufs_pio() and davinci_spi_bufs_dma().
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Consolidate the setup of SPIFMTn register under
davinci_spi_setup_transfer() simplifying the code
and avoiding unnecessary reads and writes to the
register.

The two inline functions {set|clear}_fmt_bits() can
be eliminated because of this.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Some chip-select specific paramterers like wdelay, parity, usage of
chip-select timers (and the actual timer values) are included in
platform data forcing the same behaviour across all chip-selects.

Create a new davinci_spi_config data structure which can be passed
along using controller_data member of spi_device data structure
on a per-device basis.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

The SPI_READY bit of struct spi_device:mode serves the purpose
of letting the SPI master know if the slave can signal if it is
ready for transfer or not.

The 'wait_enable' platform data was duplicating this functionality.
Use the framework provided method of indicating this capability.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Simplify pre-scalar calculation and move it into a seprate
function.

Refuse to correct invalid pre-scalar values silently as this
might lead to unexpected bugs and lower performance. Instead
an error will force users to dig into the root-cause of the
issue.

While at it, remove some device specific checks on the maximum
SPI frequency. As the driver supports the SPI interface
implemented on various devices, it should only take care of core
SPI limitations and leave the device specific handling to platform
code.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Sometimes, the chip selects provided by SPI module are
muxed with other functionality and cannot be used in
some designs. In such cases, it becomes convenient to use
an available GPIO line as chip select.

This patch enables the DaVinci SPI driver to treat specific
GPIO lines as chip selects based on information provided in
platform data.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

On TI DaVinci's SPI controller, the SPIDAT1 register which
controls the chip slect status, also has data transmit register
in the lower 16 bits. Writing to the whole 32-bits triggers
an additional data transmit every time the chip select is disabled.

While most SPI slaves cope-up with this, some cannot. This
patch fixes this by doing a 16-bit write on the upper half
of the SPIDAT1 register

While at it, group the SPIGCR1 register related defines seperately
from SPIDAT1 register defines.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Let davinci_spi_chipselect() perform both activation and
deactivation of chip selects. This lets spi_bitbang fully
control chip select activation, as intended by the SPI API.

With this change, the chip select activation code need not
be duplicated in davinci_spi_bufs_{pio|dma}().

Also, keeping chip select active control is removed as a
platform data and simply controlled using information from
spi_bitbang on whether chip slect should be activated or
de-activated.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Quit writing the same constant value determining the chip-select
mode when no transmissions are in progress in davinci_spi_chipelect().

Instead just setup the SPIDEF register once during probe.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

The typecasting of SPI base address to davinci_spi_reg is
unused.

Remove it.
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Tested-By: NBrian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Remove unused defines from code which should help
in easy reading of code.

Also, use the opportuinity to keep the SPIGCR1
register defines together.
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Tested-By: NBrian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

The 'pdata' variable is unused in couple of routines.

Remove such occurences.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Cleanup unnecessary white space from various
parts of the file.
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Fix the following checkpatch error:

WARNING: unnecessary whitespace before a quoted newline
+       dev_info(&pdev->dev, "Controller at 0x%p \n", davinci_spi->base);
Signed-off-by: NBrian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

avoids derefencing an uninitialized pointer

Change-Id: Icf528441ae481e9f6f5ddc0be32c7c217fa49701
Signed-off-by: NErik Gilling <konkers@android.com>

This patch removes convention of passing a static string as a
parameter to another static string.  The convention is intended to
reduce text usage by sharing the common bits of the string, but the
implementation is inherently fragile (a change to one format string
but not the other will nullify any possible advantage), it isn't
necessarily a net win depending on what this compiler does, and it
it reduces code readability.
Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
[grant.likely@secretlab.ca: removed dev_dbg->dev_err hunk]
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The gpiolib code does not allow people to do gpio_request() on a GPIO
once it has already been requested.  So make sure we only request the
pin on the first setup of a SPI device.  Otherwise, if you attempts to
reconfigure a SPI device on the fly (like change bit sizes), the setup
function incorrectly fails.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The error interrupt on the BF537 SIC cannot be enabled on a
per-peripheral basis.  Once the error interrupt is enabled
for one peripheral, it is automatically enabled for all.

So in the Blackfin on-chip SPI driver, we need to clear out
these known errors in the data interrupt once we've successfully
finished processing all of the pending data.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Currently spi_register_board_info() has to be called before its related
spi_master be registered, otherwise these board info will be just ignored.

This patch will remove this order limit, it adds a global spi master list
like the existing global board info listr. Whenever a board info or a
spi_master is registered, the spi master list or board info list
will be scanned, and a new spi device will be created if there is a
master-board info match.
Signed-off-by: NFeng Tang <feng.tang@intel.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

v2 changes:
  from Thierry Reding:
    * add "select TEGRA_SYSTEM_DMA" to Kconfig
  from Grant Likely:
    * add oneline description to header
    * inline references to DRIVER_NAME
    * inline references to BUSY_TIMEOUT
    * open coded bytes_per_word()
    * spi_readl/writel -> spi_tegra_readl/writel
    * move transfer validation to spi_tegra_transfer
    * don't request_mem_region iomem as platform bus does that for us
    * __exit -> __devexit

v3 changes:
  from Russell King:
    * put request_mem_region back int
  from Grant Likely:
    * remove #undef DEBUG
    * add SLINK_ to register bit defines
    * remove unused bytes_per_word
    * make spi_tegra_readl/writel static linine
    * various refactoring for clarity
    * mark err if BSY bit is not cleared after 1000 retries
    * move spinlock to protect setting of RDY bit
    * subsys_initcall -> module_init

v3 changes:
  from Grant Likely:
    * update spi_tegra to use PTR_ERRless dma API

v4 changes:
  from Grant Likely:
    * remove empty spi_tegra_cleanup fucntion
    * allow device ids of -1
Signed-off-by: NErik Gilling <konkers@android.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Russell King <linux@arm.linux.org.uk>

spi: tegra: cleanups from upstream review

Change-Id: Icecf7e64efcb39de072a15234ba1faa4bad40d25
Signed-off-by: NErik Gilling <konkers@android.com>

In case of TX only with DMA, the driver assumes that the data
has been transferred once DMA callback in invoked. However,
SPI's shift register may still contain data. Thus, the driver
is supposed to verify that the register is empty and the end of
the SPI transfer has been reached.
Signed-off-by: NIlkka Koskinen <ilkka.koskinen@nokia.com>
Tested-by: NTuomas Katila <ext-tuomas.2.katila@nokia.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

In the TX_ONLY transfer, the SPI controller also receives data
simultaneously and saves them in the rx register. After the TX_ONLY
transfer, the rx register will hold the random data received during
the last tx transaction.

If the direct following transfer is RX_ONLY, this random data has the
possibility to affect this transfer like this:
  When the SPI controller is changed from TX_ONLY to RX_ONLY,
  the random data makes the rx register full immediately and
  triggers a dummy write automatically(in SPI RX_ONLY transfers,
  we need a dummy write to trigger the first transaction).

  So the first data received in the RX_ONLY transfer will be that
  random data instead of something meaningful.

We can avoid this by inserting a Disable/Re-enable toggle of the
channel after the TX_ONLY transfer, since it purges the rx register.
Signed-off-by: NJason Wang <jason77.wang@gmail.com>
Tested-by: NGrazvydas Ignotas <notasas@gmail.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Some systems using this bus sometimes have very basic devices on them
such as regulators.  So we need to be loaded even earlier in case the
devices are used by things such as early board init code.  Therefore
register in subsys_initcall().
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Currently, if the bits_per_word when doing a transfer is not 8bits, we
always treat it as 16bits when we should actually be returning an error.
Signed-off-by: NBob Liu <lliubbo@gmail.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

When the hardware is controlling the CS, there are some SPI options
we are unable to support.  So issue a warning in the hopes that the
user will change to a SPI mode where we can support things sanely.
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NRob Maris <maris.rob@vdi.de>
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NRob Maris <maris.rob@vdi.de>
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Who knows what people will try!
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Using disable_irq() on the IRQ whose handler we are currently executing in
can easily lead to a hang.  So use the nosync variant here.
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

While combining things, also switch to the proper SPI bit define names.
This lets us punt the rarely used SPI defines.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

During runtime, the spi setup function may be called multiple times on the
same device in order to reconfigure some settings on the fly.  When this
happens, we need to reset the ctl_reg bits so that changing the mode works
as expected.
Reported-by: NAndy Getzendanner <james.getzendanner@students.olin.edu>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

This reduces duplication between the setup/transfer functions and keeps
values cached during setup from overriding values changed on a transfer
basis (like bits_per_word).
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Using disable_irq() on the IRQ whose handler we are currently executing in
can easily lead to a hang.  So use the nosync variant here.
Signed-off-by: NYi Li <yi.li@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Sometimes under load, the Blackfin core is able to send SPI register
updates out before the controller is actually disabled.  So when we
go to reprogram the entire state (to switch to a different slave),
make sure we sync after disabling the controller.
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

We can't rely on the SPI_CTL/SPI_FLG registers retaining their state when
suspending, so save/restore their entire values.
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>