1. 28 11月, 2009 1 次提交
  2. 21 9月, 2009 1 次提交
  3. 20 9月, 2009 2 次提交
    • S
      arm, cris, mips, sparc, powerpc, um, xtensa: fix build with bash 4.0 · 51b563fc
      Sam Ravnborg 提交于
      Albin Tonnerre <albin.tonnerre@free-electrons.com> reported:
      
          Bash 4 filters out variables which contain a dot in them.
          This happends to be the case of CPPFLAGS_vmlinux.lds.
          This is rather unfortunate, as it now causes
          build failures when using SHELL=/bin/bash to compile,
          or when bash happens to be used by make (eg when it's /bin/sh)
      
      Remove the common definition of CPPFLAGS_vmlinux.lds by
      pushing relevant stuff to either Makefile.build or the
      arch specific kernel/Makefile where we build the linker script.
      
      This is also nice cleanup as we move the information out where
      it is used.
      
      Notes for the different architectures touched:
      
      arm - we use an already exported symbol
      cris - we use a config symbol aleady available
             [Not build tested]
      mips - the jiffies complexity has moved to vmlinux.lds.S where we need it.
             Added a few variables to CPPFLAGS - they are only used by
             the linker script.
             [Not build tested]
      powerpc - removed assignment that is not needed
                [not build tested]
      sparc - simplified it using $(BITS)
      um - introduced a few new exported variables to deal with this
      xtensa - added options to CPP invocation
               [not build tested]
      
      Cc: Albin Tonnerre <albin.tonnerre@free-electrons.com>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Mikael Starvik <starvik@axis.com>
      Cc: Jesper Nilsson <jesper.nilsson@axis.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Jeff Dike <jdike@addtoit.com>
      Cc: Chris Zankel <chris@zankel.net>
      Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      51b563fc
    • S
      kbuild: use INSTALLKERNEL to select customized installkernel script · caa27b66
      Sam Ravnborg 提交于
      Replace the use of CROSS_COMPILE to select a customized
      installkernel script with the possibility to set INSTALLKERNEL
      to select a custom installkernel script when running make:
      
          make INSTALLKERNEL=arm-installkernel install
      
      With this patch we are now more consistent across
      different architectures - they did not all support use
      of CROSS_COMPILE.
      
      The use of CROSS_COMPILE was a hack as this really belongs
      to gcc/binutils and the installkernel script does not change
      just because we change toolchain.
      
      The use of CROSS_COMPILE caused troubles with an upcoming patch
      that saves CROSS_COMPILE when a kernel is built - it would no
      longer be installable.
      [Thanks to Peter Z. for this hint]
      
      This patch undos what Ian did in commit:
      
        0f8e2d62
        ("use ${CROSS_COMPILE}installkernel in arch/*/boot/install.sh")
      
      The patch has been lightly tested on x86 only - but all changes
      looks obvious.
      Acked-by: NPeter Zijlstra <peterz@infradead.org>
      Acked-by: Mike Frysinger <vapier@gentoo.org> [blackfin]
      Acked-by: Russell King <linux@arm.linux.org.uk> [arm]
      Acked-by: Paul Mundt <lethal@linux-sh.org> [sh]
      Acked-by: "H. Peter Anvin" <hpa@zytor.com> [x86]
      Cc: Ian Campbell <icampbell@arcom.com>
      Cc: Tony Luck <tony.luck@intel.com> [ia64]
      Cc: Fenghua Yu <fenghua.yu@intel.com> [ia64]
      Cc: Hirokazu Takata <takata@linux-m32r.org> [m32r]
      Cc: Geert Uytterhoeven <geert@linux-m68k.org> [m68k]
      Cc: Kyle McMartin <kyle@mcmartin.ca> [parisc]
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> [powerpc]
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390]
      Cc: Thomas Gleixner <tglx@linutronix.de> [x86]
      Cc: Ingo Molnar <mingo@redhat.com> [x86]
      Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      caa27b66
  4. 17 8月, 2009 1 次提交
    • B
      ARM: S5PC100: Kconfigs and Makefiles · 5a7652f2
      Byungho Min 提交于
      S5PC100 is a new SoC with ARM coretex-A8 and numerous peripherals. This SoC is
      successor of S3C64XX. S5PC100 has peripherals which are still similar to S3C
      families so some drivers in "arch/arm/plat-s3c" can be shared. S5PC100 specific
      drivers will be added in "arch/arm/plat-s5pcxx" or "arch/arm/mach-s5pc100"
      Signed-off-by: NByungho Min <bhmin@samsung.com>
      [ben-linux@fluff.org: tidy and edit description]
      Signed-off-by: NBen Dooks <ben-linux@fluff.org>
      5a7652f2
  5. 15 8月, 2009 1 次提交
  6. 14 8月, 2009 2 次提交
  7. 24 7月, 2009 2 次提交
  8. 03 7月, 2009 1 次提交
  9. 30 5月, 2009 1 次提交
    • C
      Add core support for ARMv6/v7 big-endian · 26584853
      Catalin Marinas 提交于
      Starting with ARMv6, the CPUs support the BE-8 variant of big-endian
      (byte-invariant). This patch adds the core support:
      
      - setting of the BE-8 mode via the CPSR.E register for both kernel and
        user threads
      - big-endian page table walking
      - REV used to rotate instructions read from memory during fault
        processing as they are still little-endian format
      - Kconfig and Makefile support for BE-8. The --be8 option must be passed
        to the final linking stage to convert the instructions to
        little-endian
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      26584853
  10. 29 5月, 2009 1 次提交
  11. 07 5月, 2009 1 次提交
  12. 29 4月, 2009 1 次提交
  13. 27 4月, 2009 2 次提交
  14. 26 3月, 2009 1 次提交
  15. 25 3月, 2009 1 次提交
  16. 23 3月, 2009 2 次提交
    • E
      [ARM] pxa: add base support for Marvell's PXA168 processor line · 49cbe786
      Eric Miao 提交于
      """The Marvell® PXA168 processor is the first in a family of application
      processors targeted at mass market opportunities in computing and consumer
      devices. It balances high computing and multimedia performance with low
      power consumption to support extended battery life, and includes a wealth
      of integrated peripherals to reduce overall BOM cost .... """
      
      See http://www.marvell.com/featured/pxa168.jsp for more information.
      
        1. Marvell Mohawk core is a hybrid of xscale3 and its own ARM core,
           there are many enhancements like instructions for flushing the
           whole D-cache, and so on
      
        2. Clock reuses Russell's common clkdev, and added the basic support
           for UART1/2.
      
        3. Devices are a bit different from the 'mach-pxa' way, the platform
           devices are now dynamically allocated only when necessary (i.e.
           when pxa_register_device() is called). Description for each device
           are stored in an array of 'struct pxa_device_desc'. Now that:
      
           a. this array of device description is marked with __initdata and
              can be freed up system is fully up
      
           b. which means board code has to add all needed devices early in
              his initializing function
      
           c. platform specific data can now be marked as __initdata since
              they are allocated and copied by platform_device_add_data()
      
        4. only the basic UART1/2/3 are added, more devices will come later.
      Signed-off-by: NJason Chagas <chagas@marvell.com>
      Signed-off-by: NEric Miao <eric.miao@marvell.com>
      49cbe786
    • E
      [ARM] pxa: introduce plat-pxa for PXA common code and add DMA support · bd5ce433
      Eric Miao 提交于
      1. introduce folder of 'arch/arm/plat-pxa' for common code across different
         PXA processor families
      
      2. initially moved DMA code into plat-pxa
      
      3. common code in <mach/dma.h> moved into <plat/dma.h>, new processors
         should implement its own <mach/dma.h>, provide the following required
         definitions and '#include <plat/dma.h>' in the end:
      
         - DMAC_REGS_VIRT for mapped virtual address of the DMA registers'
           physical I/O memory
      Signed-off-by: NEric Miao <eric.miao@marvell.com>
      bd5ce433
  17. 19 2月, 2009 1 次提交
  18. 16 12月, 2008 4 次提交
  19. 12 12月, 2008 1 次提交
  20. 04 12月, 2008 1 次提交
  21. 27 11月, 2008 1 次提交
  22. 22 10月, 2008 1 次提交
    • B
      [ARM] msm: rename ARCH_MSM7X00A to ARCH_MSM · 1637de0c
      Brian Swetland 提交于
      The MSM architecture covers a wider family of chips than just the MSM7X00A.
      Move to a more generic name, in perparation for supporting the specific
      SoC variants as sub-architectures (ARCH_MSM7X01A, ARCH_MSM722X, etc).  This
      gives us ARCH_MSM for the (many) common peripherals.
      
      This also removes the unused/obsolete config item MSM7X00A_IDLE.
      Signed-off-by: NBrian Swetland <swetland@google.com>
      1637de0c
  23. 09 10月, 2008 1 次提交
    • S
      ARM: OMAP3: Add minimal omap3430 support · cc26b3b0
      Syed Mohammed, Khasim 提交于
      Add minimal omap3430 support based on earlier patches from
      Syed Mohammed Khasim. Also merge in omap34xx SRAM support
      from Karthik Dasu and use consistent naming for sram init
      functions.
      
      Also do following changes that make 34xx support usable:
      
      - Remove unused sram.c functions for 34xx
      
      - Rename IRQ_SIR_IRQ to INTCPS_SIR_IRQ and define it locally
        in entry-macro.S
      
      - Update mach-omap2/io.c to support 2420, 2430, and 34xx
      
      - Also merge in 34xx GPMC changes to add fields wr_access and
        wr_data_mux_bus from Adrian Hunter
      
      - Remove memory initialization call omap2_init_memory() until
        until more generic memory initialization patches are posted.
        It's OK to rely on bootloader initialization until then.
      Signed-off-by: NSyed Mohammed, Khasim <khasim@ti.com>
      Signed-off-by: Karthik Dasu<karthik-dp@ti.com>
      Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      
      
      
      cc26b3b0
  24. 08 10月, 2008 1 次提交
  25. 30 9月, 2008 1 次提交
  26. 07 8月, 2008 2 次提交
  27. 26 7月, 2008 1 次提交
  28. 05 7月, 2008 1 次提交
  29. 03 7月, 2008 1 次提交
  30. 23 6月, 2008 2 次提交
    • S
      [ARM] add Marvell 78xx0 ARM SoC support · 794d15b2
      Stanislav Samsonov 提交于
      The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring
      (depending on the model) one or two Feroceon CPU cores with 512K of L2
      cache and VFP coprocessors running at (depending on the model) between
      800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe
      interfaces that can each run either in x4 or quad x1 mode, three USB
      2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two
      TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI
      interface, four UARTs, and depending on the model, two or four gigabit
      ethernet interfaces.
      
      This patch adds basic support for the platform, and allows booting
      on the MV78x00 development board, with functional UARTs, SATA, PCIe,
      GigE and USB ports.
      Signed-off-by: NStanislav Samsonov <samsonov@marvell.com>
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      794d15b2
    • S
      [ARM] add Marvell Kirkwood (88F6000) SoC support · 651c74c7
      Saeed Bishara 提交于
      The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
      Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
      a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
      interface, and IDMA/XOR engines, and depending on the model, also
      features one or two Gigabit Ethernet interfaces, two SATA II
      interfaces, one or two TWSI interfaces, one or two UARTs, a
      TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
      an SDIO interface.
      
      This patch adds supports for the Marvell DB-88F6281-BP Development
      Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
      enabling support for the PCIe interface, the USB interface, the
      ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
      UARTs, and the NAND controller.
      Signed-off-by: NSaeed Bishara <saeed@marvell.com>
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      651c74c7