- 29 1月, 2015 1 次提交
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由 Barry Song 提交于
marco project is replaced by atlas7 and we should obliterate its all traces. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 24 11月, 2014 1 次提交
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由 Andrew Bresticker 提交于
Move the GIC clocksource driver to drivers/clocksource/mips-gic-timer.c. Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8133/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 28 10月, 2014 1 次提交
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由 Linus Walleij 提交于
This moves the timer/clocksource implementation for the Integrator/AP down to drivers/clocksource and augments the driver a little to use CLOCKSOURCE_OF_DECLARE(). Remove the static mapping of the timer blocks while we're at it. Tested on the Integrator/AP. Acked-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 9月, 2014 1 次提交
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由 Carlo Caione 提交于
Meson6 SoCs are equipped with 5 32-bit timers, called TIMER_A, TIMER_B, TIMER_C, TIMER_D and TIMER_E. The driver is providing clocksource support for the 32-bit counter using TIMER_E. Clockevents are also supported using TIMER_A. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NCarlo Caione <carlo@caione.org> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com>
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- 15 9月, 2014 1 次提交
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由 Maxime Ripard 提交于
Now that we don't depend on anyting in the mach-at91 directory, we can just move the driver to where it belongs. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NBoris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Conflicts: arch/arm/mach-at91/Kconfig arch/arm/mach-at91/Makefile
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- 23 7月, 2014 3 次提交
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由 Robert Jarzmik 提交于
Move time.c from arch/arm/mach-pxa/time.c to drivers/clocksource/pxa_timer.c. Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Alexander Shiyan 提交于
This adds the clocksource driver for Cirrus Logic CLPS711X series SoCs. Designed primarily for migration CLPS711X subarch for multiplatform & DT, for this as the "OF" and "non-OF" calls implemented. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Matthias Brugger 提交于
This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com> Acked-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 23 5月, 2014 1 次提交
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由 Xiubo Li 提交于
The Freescale FlexTimer Module time reference is a 16-bit counter that can be used as an unsigned or signed increase counter. CNTIN defines the starting value of the count and MOD defines the final value of the count. The value of CNTIN is loaded into the FTM counter, and the counter increments until the value of MOD is reached, at which point the counter is reloaded with the value of CNTIN. That's also when an overflow interrupt will be generated. Here using the 'evt' prefix or postfix as clock event device and the 'src' as clock source device. Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Jingchang Lu <b35083@freescale.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 16 5月, 2014 1 次提交
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由 Pawel Moll 提交于
This patch adds a trival sched clock source using free running, 24MHz clocked counter present in the ARM Ltd. reference platforms (Versatile, RealView, Versatile Express) System Registers block. This code replaces the call in the VE machine code. Signed-off-by: NPawel Moll <pawel.moll@arm.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
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- 12 3月, 2014 2 次提交
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由 Ivan Khoronzhuk 提交于
Add broadcast clock-event device for the Keystone arch. The timer can be configured as a general-purpose 64-bit timer, dual general-purpose 32-bit timers. When configured as dual 32-bit timers, each half can operate in conjunction (chain mode) or independently (unchained mode) of each other. Reviewed-by: NStephen Boyd <sboyd@codeaurora.org> Acked-by: NSantosh shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Linus Walleij 提交于
Move the U300 timer driver down to the clocksource driver subsystem and keep arch/arm clean. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 12 2月, 2014 1 次提交
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由 David Rientjes 提交于
There should no longer be any IBM x440 systems or those using the Summit/EXA chipset out in the wild, so remove support for it. We've done our due diligence in reaching out to any contact information listed for this chipset and no indication was given that it should be kept around. Signed-off-by: NDavid Rientjes <rientjes@google.com>
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- 05 2月, 2014 1 次提交
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由 Kumar Gala 提交于
We intend to share the clocksource code for MSM platforms between legacy and multiplatform supported qcom SoCs. Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NKumar Gala <galak@codeaurora.org>
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- 14 12月, 2013 1 次提交
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由 Christian Daudt 提交于
Currently ARCH_BCM has been used for Broadcom Mobile V7 based SoCs. In order to allow other Broadcom SoCs to also use mach-bcm directory and files, this patch renames the original ARCH_BCM to ARCH_BCM_MOBILE, and uses ARCH_BCM to define any Broadcom chip residing in mach-bcm directory. Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Acked-by: NOlof Johansson <olof@lixom.net> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 11 12月, 2013 1 次提交
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由 Maxime Ripard 提交于
Most of the Allwinner SoCs (at this time, all but the A10) also have a High Speed timers that are not using the 24MHz oscillator as a source but rather the AHB clock running much faster. The IP is slightly different between the A10s/A13 and the one used in the A20/A31, since the latter have 4 timers available, while the former have only 2 of them. [dlezcano] : Fixed conflict with b788beda "Order Kconfig options alphabetically" Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Tested-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 23 10月, 2013 1 次提交
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由 Uwe Kleine-König 提交于
An efm32 features 4 16-bit timers with a 10-bit prescaler. This driver provides clocksource and clock event device using one timer instance each. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 18 7月, 2013 1 次提交
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由 Jonas Jensen 提交于
This patch adds an clocksource driver for the main timer(s) found on MOXA ART SoCs. The MOXA ART SoC provides three separate timers with individual count/load/match registers, two are used here: TIMER1: clockevents, used to support oneshot and periodic events TIMER2: set up as a free running counter, used as clocksource Timers are preconfigured by bootloader to count down and interrupt on match or zero. Count increments every APB clock cycle and is automatically reloaded when it reaches zero. Signed-off-by: NJonas Jensen <jonas.jensen@gmail.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 03 7月, 2013 1 次提交
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由 Stuart Menefy 提交于
This is a simple driver for the global timer module found in the Cortex A9-MP cores from revision r1p0 onwards. This should be able to perform the functions of the system timer and the local timer in an SMP system. The global timer has the following features: The global timer is a 64-bit incrementing counter with an auto-incrementing feature. It continues incrementing after sending interrupts. The global timer is memory mapped in the private memory region. The global timer is accessible to all Cortex-A9 processors in the cluster. Each Cortex-A9 processor has a private 64-bit comparator that is used to assert a private interrupt when the global timer has reached the comparator value. All the Cortex-A9 processors in a design use the banked ID, ID27, for this interrupt. ID27 is sent to the Interrupt Controller as a Private Peripheral Interrupt. The global timer is clocked by PERIPHCLK. Signed-off-by: NStuart Menefy <stuart.menefy@st.com> Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Rob Herring <robherring2@gmail.com> CC: Linus Walleij <linus.walleij@linaro.org> CC: Will Deacon <will.deacon@arm.com> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 02 7月, 2013 1 次提交
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由 Sebastian Hesselbarth 提交于
This patch add a DT enabled driver for timers found on Marvell Orion SoCs (Kirkwood, Dove, Orion5x, and Discovery Innovation). It installs a free- running clocksource on timer0 and a clockevent source on timer1. Corresponding device tree documentation is also added. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NAndrew Lunn <andrew@lunn.ch>
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- 25 6月, 2013 1 次提交
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由 Mark Rutland 提交于
Several architectures have a dummy timer driver tightly coupled with their broadcast code to support machines without cpu-local timers (or where there is a lack of driver support). Since 12ad1000: "clockevents: Add generic timer broadcast function" it's been possible to write broadcast-capable timer drivers decoupled from the broadcast mechanism. We can use this functionality to implement a generic dummy timer driver that can be shared by all architectures with generic tick broadcast (ARCH_HAS_TICK_BROADCAST). This patch implements a generic dummy timer using this facility. [sboyd: Make percpu data static, use __this_cpu_ptr(), move to early_initcall to properly register on each CPU, only register if more than one CPU possible] Signed-off-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com>, Cc: John Stultz <john.stultz@linaro.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1370291642-13259-3-git-send-email-sboyd@codeaurora.orgSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 06 6月, 2013 2 次提交
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由 Daniel Tang 提交于
This patch adds a clocksource/clockevent driver for the timer found on some models in the TI-Nspire calculator series. The timer has two 16bit subtimers within its memory mapped I/O interface but only the first can generate interrupts. The first subtimer is used to generate clockevents but only if an interrupt number and register is given. The interrupt acknowledgement mechanism is a little strange because the interrupt mask and acknowledge registers are located in another memory mapped I/O peripheral. The address of this register is passed to the driver through device tree bindings. The second subtimer is used as a clocksource because it isn't capable of generating an interrupt. This subtimer is always added. Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NDaniel Tang <dt.tangr@gmail.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Jingchang Lu 提交于
Add Freescale Vybrid Family period interrupt timer support. Signed-off-by: NJingchang Lu <b35083@freescale.com> Reviewed-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 21 4月, 2013 1 次提交
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由 Tomasz Figa 提交于
This adds a new clocksource driver for the PWM timer that is present in most Samsung SoCs, based on the existing driver in arch/arm/plat-samsung/samsung-time.c and many changes implemented by Tomasz Figa. Originally, the conversion of all Samsung machines to the new driver was planned for 3.10, but that work ended up being too late and too invasive just before the merge window. Unfortunately, other changes in the Exynos platform resulted in some Exynos4 setups, particularly the Universal C210 board to be broken. In order to fix that with minimum risk, so we now leave the existing pwm clocksource driver in place for all older platforms and use the new driver only for device tree enabled boards. This way, we can get the broken machines running again using DT descriptions. All clocksource changes were implemented by Tomasz, while the DT registration was rewritten by Arnd. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Tomasz Figa <t.figa@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de>
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- 09 4月, 2013 1 次提交
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由 Maxime Ripard 提交于
During the introduction of the Allwinner SoC platforms, sunxi was initially meant as a generic name for all the variants of the Allwinner SoC. It was ok at the time of the support of only the A10 and A13 that looks pretty much the same, but it's beginning to be troublesome with the future addition of the Allwinner A31 (sun6i) that is quite different, and would introduce some weird logic, where sunxi would actually mean in some case sun4i and sun5i but without sun6i... Moreover, it makes the compatible strings naming scheme not consistent with other architectures, where usually for this kind of compability, we just use the oldest SoC name that has this IP, so let's do just this. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 04 4月, 2013 1 次提交
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由 Michal Simek 提交于
Move zynq timer out of mach folder to generic location and enable it. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 01 4月, 2013 1 次提交
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由 Shawn Guo 提交于
Move mxs timer driver into drivers/clocksource as mxs_timer.c. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 29 3月, 2013 1 次提交
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由 Christian Daudt 提交于
This adds support for the Broadcom timer, used in the following SoCs: BCM11130, BCM11140, BCM11351, BCM28145, BCM28155 Updates from V6: - Split DT portion into a separate patch Updates from V5: - Rebase to latest arm-soc/for-next Updates from V4: - Switch code to use CLOCKSOURCE_OF_DECLARE Updates from V3: - Migrate to 3.9 timer framework updates Updates from V2: - prepend static fns + fields with kona_ Updates from V1: - Rename bcm_timer.c to bcm_kona_timer.c - Pull .h into bcm_kona_timer.c - Make timers static - Clean up comment block - Switched to using clockevents_config_and_register - Added an error to the get_timer loop if it repeats too much - Added to Documentation/devicetree/bindings/arm/bcm/bcm,kona-timer.txt - Added missing readl to timer_disable_and_clear Note: bcm,kona-timer was kept as the 'compatible' field to make it specific enough for when there are multiple bcm timers (bcm,timer is too generic). Signed-off-by: NChristian Daudt <csd@broadcom.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NJohn Stultz <john.stultz@linaro.org> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NJohn Stultz <john.stultz@linaro.org>
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- 25 3月, 2013 1 次提交
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由 Arnd Bergmann 提交于
This moves the two sirf clocksource drivers to drivers/clocksource and integrates them into the framework for locating the clock sources automatically. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Tested-by: NBarry Song <Baohua.Song@csr.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de>
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- 09 3月, 2013 1 次提交
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由 Thomas Abraham 提交于
Move the multi core timer (mct) driver to from mach-exynos to drivers/clocksource and update the Kconfig and makefiles. Cc: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 03 3月, 2013 1 次提交
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由 James Hogan 提交于
Add time keeping code for metag. Meta hardware threads have 2 timers. The background timer (TXTIMER) is used as a free-running time base, and the interrupt timer (TXTIMERI) is used for the timer interrupt. Both counters traditionally count at approximately 1MHz. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: John Stultz <johnstul@us.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de>
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- 31 1月, 2013 2 次提交
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由 Mark Rutland 提交于
The arch_timer driver supports a superset of the functionality of the arm_generic driver, and is not tied to a particular arch. This patch moves arm64 to use the arch_timer driver, gaining additional functionality in doing so, and removes the (now unused) arm_generic driver. Timer-related hooks specific to arm64 are moved into arch/arm64/kernel/time.c. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Mark Rutland 提交于
The core functionality of the arch_timer driver is not directly tied to anything under arch/arm, and can be split out. This patch factors out the core of the arch_timer driver, so it can be shared with other architectures. A couple of functions are added so that architecture-specific code can interact with the driver without needing to touch its internals. The ARM_ARCH_TIMER config variable is moved out to drivers/clocksource/Kconfig, existing uses in arch/arm are replaced with HAVE_ARM_ARCH_TIMER, which selects it. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
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- 29 1月, 2013 1 次提交
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由 Stephen Warren 提交于
Move arch/arm/mach-tegra/timer.c to drivers/clocksource/tegra20_timer.c so that the code is co-located with other clocksource drivers, and to reduce the size of the mach-tegra directory. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 14 1月, 2013 1 次提交
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由 Tony Prisk 提交于
This patch moves arch-vt8500/timer.c into drivers/clocksource and updates the necessary Kconfig/Makefile options. Signed-off-by: NTony Prisk <linux@prisktech.co.nz>
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- 03 1月, 2013 1 次提交
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由 Stephen Warren 提交于
It is desirable to move all clocksource drivers to drivers/clocksource, yet each requires its own initialization function. We'd rather not pollute <linux/> with a header for each function. Instead, create a single of_clksrc_init() function which will determine which clocksource driver to initialize based on device tree. Based on a similar patch for drivers/irqchip by Thomas Petazzoni. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 17 11月, 2012 1 次提交
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由 Maxime Ripard 提交于
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> CC: Thomas Gleixner <tglx@linutronix.de> CC: John Stultz <johnstul@us.ibm.com>
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- 05 11月, 2012 1 次提交
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由 Linus Walleij 提交于
This moves the MTU timer driver from arch/arm/plat-nomadik to drivers/clocksource and moves the header file to the platform_data directory. As this moves the last file being compiled to an object out of arch/arm/plat-nomadik, we have to "turn off the light" and delete the plat-nomadik directory, because it is not allowed to have an empty Makefile in a plat-* directory. This is probably also a desired side effect of depopulating the arch/arm directory of drivers. Luckily we have just deleted all the <plat/*> include files prior to this so by moving the last one we may delete the directory. After this all the Ux500 and Nomadik device drivers live outside of the arch/arm hierarchy. Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 20 9月, 2012 1 次提交
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由 Simon Arlott 提交于
The System Timer peripheral provides four 32-bit timer channels and a single 64-bit free running counter. Each channel has an output compare register, which is compared against the 32 least significant bits of the free running counter values, and generates an interrupt. Timer 3 is used as the Linux timer. The BCM2835 also contains an SP804-based timer module. However, it apparently has significant differences from the standard SP804 IP block, and Broadcom's documentation recommends using the system timer instead. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Moved to drivers/clocksource/. This looks like the desired location for such code now. * Added DT binding docs. * Moved struct sys_timer bcm2835_timer into time.c to encapsulate it more. * Simplified bcm2835_time_init() to find one matching node and operate on it, rather than looping over all matching nodes. This seems more consistent with other clocksource code. * Simplified bcm2835_time_init() using of_iomap(). * Renamed struct bcm2835_timer.index to match_mask to better represent its purpose. * s/printk(PR_INFO/pr_info(/ Signed-off-by: NChris Boot <bootc@bootc.net> Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Signed-off-by: NDom Cobley <popcornmix@gmail.com> Signed-off-by: NDom Cobley <dc4@broadcom.com> Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 17 9月, 2012 1 次提交
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由 Marc Zyngier 提交于
This patch adds support for the ARM generic timers with A64 instructions for accessing the timer registers. It uses the physical counter as the clock source and the virtual counter as sched_clock. The timer frequency can be specified via DT or read from the CNTFRQ_EL0 register. The physical counter is also accessible from user space allowing fast gettimeofday() implementation. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NNicolas Pitre <nico@linaro.org> Acked-by: NOlof Johansson <olof@lixom.net> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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