- 10 11月, 2010 1 次提交
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由 Paul Walmsley 提交于
Add hwmod structures for I2C controllers on OMAP2420/2430. NOTE: I2C module on OMAP2420 has 16bit registers and causes imprecise aborts if 32bits are read/written to it. Use the HWMOD_16BIT_REG flag to notify the hmwod framework of this hard requirement so that __raw_writew/readw is used to read /write the mdoule registers. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 21 5月, 2010 1 次提交
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由 Paul Walmsley 提交于
Fix all of the remaining OMAP2 PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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- 09 2月, 2009 1 次提交
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由 Paul Walmsley 提交于
This patch fixes a few OMAP2xxx CM_IDLEST bits that were incorrectly marked as being OMAP2xxx-wide, when they were actually 2420-specific. Also, originally when the PRCM register macros were defined, bit shift macros used a "_SHIFT" suffix, and mask macros used none. This became a source of bugs and confusion, as the mask macros were mistakenly used for shift values. Gradually, the mask macros have been updated, piece by piece, to add a "_MASK" suffix on the end to clarify. This patch applies this change to the CM_IDLEST_* register bits. The patch also adds a few bits that were missing, mostly from the 3430ES1 to ES2 revisions. linux-omap source commits are d18eff5b5fa15e170794397a6a94486d1f774f77, e1f1a5cc24615fb790cc763c96d1c5cfe6296f5b, and part of 9fe6b6cf8d9e0cbb429fd64553a4b3160a9e99e1 Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 19 8月, 2008 1 次提交
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由 Paul Walmsley 提交于
Add clockdomain definitions for OMAP24xx and OMAP34xx chips. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 4月, 2008 1 次提交
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由 Paul Walmsley 提交于
This patch adds common register access for 24xx and 34xx power and clock management in order to share code between 24xx and 34xx. Only change USB platform init code to use new register access, other access will be changed in later patches. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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