1. 03 9月, 2013 2 次提交
    • M
      drm/i915: sanitize forcewake registers on reset · 521198a2
      Mika Kuoppala 提交于
      In reset we try to restore the forcewake state to
      pre reset state, using forcewake_count. The reset
      doesn't seem to clear the forcewake bits so we
      get warn on forcewake ack register not clearing.
      
      Use same mechanism as intel_uncore_sanitize() does
      when loading driver to reset the forcewake bits, right
      after the chip has been reset.
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NMika Kuoppala <mika.kuoppala@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      521198a2
    • M
      drm/i915: Don't mask EI UP interrupt on IVB|SNB · a9c1f90c
      Mika Kuoppala 提交于
      Submitting a batchbuffer which simulates a gpu
      hang by doing MI_BATCH_BUFFER_START into itself,
      to test hangcheck, started to hard hang the whole box
      (IVB). Bisecting lead to this commit:
      
      commit 664b422c2966cd39b8f67e8d53a566ea8c877cd6
      Author: Vinit Azad <vinit.azad@intel.com>
      Date:   Wed Aug 14 13:34:33 2013 -0700
      
          drm/i915: Only unmask required PM interrupts
      
      Experimenting with the mask register showed that
      unmasking EI UP will prevent the hard hang in IVB and SNB.
      HSW doesn't hang with EI UP masked.
      
      Considering we are just disabling interrupts that aren't even
      delivered to driver, this change is more likely to paper over some
      weirdness in gpu's internal state machine. But until better
      explanation can be found, let's trade little bit of power
      for stability on these architectures.
      
      v2: - Unmask EI_EXPIRED directly in I915_WRITE (Vinit)
      v3: - Only unmask on SNB and IVB
      
      Cc: Vinit Azad <vinit.azad@intel.com>
      Signed-off-by: NMika Kuoppala <mika.kuoppala@intel.com>
      Acked-by: NVinit Azad <vinit.azad@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      a9c1f90c
  2. 02 9月, 2013 7 次提交
  3. 31 8月, 2013 31 次提交