提交 f30df435 编写于 作者: A Alex Deucher

drm/radeon/dpm: only need to reprogram uvd if uvd pg is enabled

Avoid needless uvd reprogramming if uvd powergating is disabled.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>
上级 a7f28f0f
......@@ -1491,17 +1491,20 @@ void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate)
pi->uvd_power_gated = gate;
if (gate) {
uvd_v1_0_stop(rdev);
cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, false);
if (pi->caps_uvd_pg) {
uvd_v1_0_stop(rdev);
cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, false);
}
kv_update_uvd_dpm(rdev, gate);
if (pi->caps_uvd_pg)
kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerOFF);
} else {
if (pi->caps_uvd_pg)
if (pi->caps_uvd_pg) {
kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerON);
uvd_v4_2_resume(rdev);
uvd_v1_0_start(rdev);
cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, true);
uvd_v4_2_resume(rdev);
uvd_v1_0_start(rdev);
cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, true);
}
kv_update_uvd_dpm(rdev, gate);
}
}
......
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