1. 07 12月, 2010 1 次提交
  2. 06 12月, 2010 1 次提交
    • D
      ce4100: Add errata fixes for UART on CE4100 · 5ec6960f
      Dirk Brandewie 提交于
      This patch enables the UART on the CE4100. The UART has a couple of
      issues that need to be worked around. First the UART is mostly PC
      compatible except that it is clocked eight times faster than a
      standard PC so the default configuration provided in
      arch/x86/include/asm/serial.h needs to be overridden. Second the TX
      interrupt may not be set correctly all the time. Lastly accessing the
      UART via I/O space for early_prink() hangs the chip when the IOAPIC is
      enabled.
      
      A custom mem_serial_in() is provided to work around the TX interrupt
      issue. The configuration issues are dealt with in the call back
      registered with the 8250 driver via serial8250_set_isa_configurator()
      Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
      LKML-Reference: <1290436128-17958-1-git-send-email-dirk.brandewie@gmail.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      5ec6960f
  3. 20 11月, 2010 1 次提交
  4. 19 11月, 2010 1 次提交
  5. 12 11月, 2010 2 次提交
  6. 11 11月, 2010 4 次提交
  7. 10 11月, 2010 1 次提交
  8. 09 11月, 2010 2 次提交
    • J
      x86: mrst: Parse SFI timer table for all timer configs · 7f05dec3
      Jacob Pan 提交于
      Penwell has APB timer based watchdog timers, it requires platform code to parse
      SFI MTMR tables in order to claim its timer.
      
      This patch will always parse SFI MTMR regardless of system timer configuration
      choices. Otherwise, SFI MTMR table may not get parsed if running on Medfield
      with always-on local APIC timers and constant TSC. Watchdog timer driver will
      then not get a timer to use.
      Signed-off-by: NJacob Pan <jacob.jun.pan@linux.intel.com>
      Signed-off-by: NAlan Cox <alan@linux.intel.com>
      LKML-Reference: <20101109112800.20591.10802.stgit@localhost.localdomain>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      7f05dec3
    • F
      x86/mrst: Add SFI platform device parsing code · 1da4b1c6
      Feng Tang 提交于
      SFI provides a series of tables. These describe the platform devices present
      including SPI and I²C devices, as well as various sensors, keypads and other
      glue as well as interfaces provided via the SCU IPC mechanism (intel_scu_ipc.c)
      
      This patch is a merge of the core elements and relevant fixes from the
      Intel development code by Feng, Alek, myself into a single coherent patch
      for upstream submission.
      
      It provides the needed infrastructure to register I2C, SPI and platform devices
      described by the tables, as well as handlers for some of the hardware already
      supported in kernel. The 0.8 firmware also provides GPIO tables.
      
      Devices are created at boot time or if they are SCU dependant at the point an
      SCU is discovered. The existing Linux device mechanisms will then handle the
      device binding. At an abstract level this is an SFI to Linux device translator.
      
      Device/platform specific setup/glue is in this file. This is done so that the
      drivers for the generic I²C and SPI bus devices remain cross platform as they
      should.
      
      (Updated from RFC version to correct the emc1403 name used by the firmware
       and a wrongly used #define)
      Signed-off-by: NAlek Du <alek.du@linux.intel.com>
      LKML-Reference: <20101109112158.20013.6158.stgit@localhost.localdomain>
      [Clean ups, removal of 0.7 support]
      Signed-off-by: NFeng Tang <feng.tang@linux.intel.com>
      [Clean ups]
      Signed-off-by: NAlan Cox <alan@linux.intel.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      1da4b1c6
  9. 27 10月, 2010 8 次提交