This patch adds initial driver data for Exynos7 pinctrl support.
Signed-off-by: NNaveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: NThomas Abraham <thomas.ab@samsung.com>
Tested-by: NThomas Abraham <thomas.ab@samsung.com>
Acked-by: NTomasz Figa <tomasz.figa@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>

Exynos7 uses different offsets for wakeup interrupt configuration registers.
So a new irq_chip instance for Exynos7 wakeup interrupts is added. The irq_chip
selection is now based on the wakeup interrupt controller compatible string.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: NThomas Abraham <thomas.ab@samsung.com>
Tested-by: NThomas Abraham <thomas.ab@samsung.com>
Acked-by: NTomasz Figa <tomasz.figa@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>

Adding a irq_chip field to the samsung_pin_bank struct helps in
consolidating the irq domain callbacks for external gpio and wakeup
interrupt controllers. The exynos_wkup_irqd_ops and exynos_gpio_irqd_ops
have now been merged into a single exynos_eint_irqd_ops.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: NThomas Abraham <thomas.ab@samsung.com>
Tested-by: NThomas Abraham <thomas.ab@samsung.com>
Acked-by: NTomasz Figa <tomasz.figa@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>

The function exynos_irq_demux_eint16_31 uses pre-defined offsets for external
interrupt pending status and mask registers. So this function is not extensible
for Exynos7 SoC which has these registers at different offsets. Generalize
the exynos_irq_demux_eint16_31 function by using the pending/mask register
offset values from the exynos_irq_chip structure. This is done by adding a
irq_chip field to the samsung_pin_bank struct.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: NThomas Abraham <thomas.ab@samsung.com>
Tested-by: NThomas Abraham <thomas.ab@samsung.com>
Acked-by: NTomasz Figa <tomasz.figa@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>

Currently the driver mixes constant init data with runtime data, which
is far from being elegant and can invite potential hard to track issues.
This patch intends to solve this by introducing a new
samsung_pin_bank_data structure to hold only constant data known at
compile time, which can be copied to main samsung_pin_bank struct used
at runtime.

In addition, thanks to this change, all per-bank initdata can be marked
with const and __initconst keywords and dropped after init completes.
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>

In order to separate initialization constants from runtime data, this
patch modifies the driver to store only constant data in
samsung_pin_ctrl struct and copy data required at runtime to
samsung_pinctrl_drv_data struct. This makes it possible to mark all
existing instances of samsung_pin_ctrl struct as const and __initconst.
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>

This structure is not intended to be modified at runtime and functions
as constant data shared between multiple pin banks. This patch makes all
instances of it constant across the driver.
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>

There is no code using it and in fact there are pin controller variants
that do not even have this field initialized in their init data. This
patch removes it completely.
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>

Currently the function returns a valid pointer on success and NULL on
error, so exact error code is lost. This patch changes return convention
of the function to use ERR_PTR() on error instead.
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>

This driver supports the pin/GPIO controllers found in newer Intel SoCs
like Cherryview and Braswell. The driver provides full GPIO support and
minimal set of pin controlling funtionality.

The driver is based on the original Cherryview GPIO driver authored by Ning
Li and Alan Cox.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The GPIO resources (GpioIo/GpioInt) used in ACPI contain a GPIO number
which is relative to the hardware GPIO controller. Typically this number
can be translated directly to Linux GPIO number because the mapping is
pretty much 1:1.

However, when the GPIO driver is using pins exported by a pin controller
driver via set of GPIO ranges, the mapping might not be 1:1 anymore and
direct translation does not work.

In such cases we need to translate the ACPI GPIO number to be suitable for
the GPIO controller driver in question by checking all the pin controller
GPIO ranges under the given device and using those to get the proper GPIO
number.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Save and restore the gpio6_c6 pinmux setting, since Maskrom of RK3288
would modify it to sdmmc0_det, so it need to be restored to the correct
setting after resume from Maskrom.
Signed-off-by: NChris Zhong <zyw@rock-chips.com>
Tested-by: NDoug Anderson <dianders@chromium.org>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

support suspend/resume of pinctrl, it allows handling sleep mode
for hogged pins in pinctrl
Signed-off-by: NChris Zhong <zyw@rock-chips.com>
Tested-by: NDoug Anderson <dianders@chromium.org>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

Sanity check on resource happening with devm_ioremap_resource().
Signed-off-by: NVarka Bhadram <varkab@cdac.in>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The A80 has a rather usual pin controller, the only thing out of the ordinary
being that it has 5 interrupts banks, and that some pins have several options
for the same functions.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The A80 R-PIO controller has one more bank that what we've seen so far, add the
PN pin bank.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The mxs pinctrl driver cannot handle when functions are not grouped by
name (which IMO is a bug). This happens for example if a
imx28-somemachine.dts provides a function that has the same name as a
function defined in imx28.dtsi.

The proper way to fix that would be to check for duplicates in the loops
(which increases parsing time) or parse the groups first and sort the
resulting array.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There were a few instances where the rockchip pinctrl driver would do
read-modify-write with no spinlock.  Add a spinlock for these cases.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

Just like in (529301c1 pinctrl: samsung: Parse pin groups before
calling pinctrl_register()), Rockchip also needs to parse pin groups
earlier to make hogs work.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Tested-by: NChris Zhong <zyw@rock-chips.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

The Rockchip pinctrl driver was calling
rockchip_gpio_direction_output() in the pin_config_set() callback.
This was just a shortcut for:
* rockchip_gpio_set()
* pinctrl_gpio_direction_output()

Unfortunately it's not so good to call pinctrl_gpio_direction_output()
from pin_config_set().  Specifically when initting hogs you'll get an
error.

Let's refactor a little so we can call
_rockchip_pmx_gpio_set_direction() directly.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Tested-by: NChris Zhong <zyw@rock-chips.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

The rockchip pinctrl driver uses irq_gc_set_wake() but doesn't setup
the .wake_enabled member.  That means that we can never actually use a
pin for wakeup.  When "irq_set_irq_wake()" tries to call through it
will always get a failure from set_irq_wake_real() and will then set
wake_depth to 0.  Assuming you can resume you'll later get an error
message about "Unbalanced IRQ x wake disable".
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Tested-by: NChris Zhong <zyw@rock-chips.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

We are going to have more pinctrl drivers for Intel hardware so separate
all our pin controller drivers to own directory.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This is the pinctrl, pinmux, pinconf and gpiolib driver for the
Qualcomm MPP sub-function blocks found in the PMIC chips.
Signed-off-by: NIvan T. Ivanov <iivanov@mm-sol.com>
Acked-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This is the pinctrl, pinmux, pinconf and gpiolib driver for the
Qualcomm GPIO sub-function blocks found in the PMIC chips.
Signed-off-by: NIvan T. Ivanov <iivanov@mm-sol.com>
Acked-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Copy the mach/at91_pio.h header locally and use it for pinctrl-at91.c. This
allows to remove the dependency on mach/at91_pio.h to be able to move at91 to
multiplatform.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Sanity check on resource happening with devm_ioremap_resource().
Signed-off-by: NVarka Bhadram <varkab@cdac.in>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

When dumping pinconf information in debugfs, config arguments are only
printed when a unit is present and the argument is != 0. For parameters
like the slew rate, this does not work. The slew rate uses a driver
specific format for the argument, i.e. 0 can be a valid argument and a
unit is not provided for it.
For that reason, add a flag to enable printing the argument instead of
inferring it from the presence of a unit and the value of the argument.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The pinctrl config helpers make a separate copy of the configuration, so
callers must make sure to free any dynamically allocated memory that was
used to store it.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

pinctrl-baytrail driver provides a proper ->remove()
method on its platform_driver definition, however there's
no way, currently, to unload the driver due to missing
module_exit(). This patch adds module_exit().
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NDavid Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add pinmux support for GPIO for Vybrid (vf610) IOMUX controller.
This is needed since direction configuration is not part of the
GPIO module in Vybrid.
Signed-off-by: NStefan Agner <stefan@agner.ch>
Acked-by: NShawn Guo <shawn.guo@freescale.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This change fixes below sparse error,
drivers/pinctrl/pinctrl-st.c:1515:31: error: incompatible types for operation (>)
drivers/pinctrl/pinctrl-st.c:1515:31:    left side has type void [noderef] <asn:2>*irqmux_base
drivers/pinctrl/pinctrl-st.c:1515:31:    right side has type int

Cc: Maxime Coquelin <maxime.coquelin@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
CC: Linus Walleij <linus.walleij@linaro.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NPramod Gurav <pramod.gurav@smartplayin.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There is a missing MMC/SD pin for MCDATDIR2 which is routed as
alt B, add it to the MMC/SD pin group and functions.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This is generic pin configuration, so add .is_generic.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The abx500 pin control driver supported a method of fetching the
generic config from a phandle to a separate node using the
"ste,config" as a phandle. This is not used in any device trees
and not documented in the bindings, so drop this support.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This converts the ABx500 pin controller and all associated device
trees to use the standard, generic config bindings for pin controllers.
There are no such device trees deployed in the wild so this is
safe to do to set a good example.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This converts the Nomadik pin controller and all associated device
trees to use the standard, generic config bindings for pin controllers.
There are no such device trees deployed in the wild so this is
safe to do to set a good example.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This converts the ABx500 pin controller and all associated device
trees to use the standard, generic mux bindings for pin controllers.
There are no such device trees deployed in the wild so this is
safe to do to set a good example.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This converts the Nomadik pin controller and all associated device
trees to use the standard, generic mux bindings for pin controllers.
There are no such device trees deployed in the wild so this is
safe to do to set a good example.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

skb->truesize is not meant to be tracking amount of used bytes
in an skb, but amount of reserved/consumed bytes in memory.

For instance, if we use a single byte in last page fragment,
we have to account the full size of the fragment.

skb->truesize can be very different from skb->len, that has
a very specific safety purpose.
Signed-off-by: NEric Dumazet <edumazet@google.com>
Cc: Rasesh Mody <rasesh.mody@qlogic.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Commit b4d2394d ("dsa: Replace mii_bus with a generic host device")
replaces mii_bus with a generic host_dev, and introduces
dsa_host_dev_to_mii_bus() to support conversion from host_dev to mii_bus.
However, in some cases it uses to_mii_bus to perform that conversion.
Since host_dev is not the phy bus device but typically a platform device,
this fails and results in a crash with the affected drivers.

BUG: unable to handle kernel NULL pointer dereference at           (null)
IP: [<ffffffff81781d35>] __mutex_lock_slowpath+0x75/0x100
PGD 406783067 PUD 406784067 PMD 0
Oops: 0002 [#1] SMP
...
Call Trace:
[<ffffffff810a538b>] ? pick_next_task_fair+0x61b/0x880
[<ffffffff81781de3>] mutex_lock+0x23/0x37
[<ffffffff81533244>] mdiobus_read+0x34/0x60
[<ffffffff8153b95a>] __mv88e6xxx_reg_read+0x8a/0xa0
[<ffffffff8153b9bc>] mv88e6xxx_reg_read+0x4c/0xa0

Fixes: b4d2394d ("dsa: Replace mii_bus with a generic host device")
Cc: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>
Acked-by: NAlexander Duyck <alexander.h.duyck@redhat.com>
Acked-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>