1. 18 3月, 2013 2 次提交
    • M
      ARM: shmobile: INTC External IRQ pin driver on r8a7779 · 8e56e6d5
      Magnus Damm 提交于
      Update the r8a7779 IRQ code to make use of the
      INTC External IRQ pin driver for external
      interrupt pins IRQ0 -> IRQ3.
      
      The r8a7779 SoC can like older SH SoCs configure
      to use the IRQ0 -> IRQ3 signals as individual
      interrupts or a combined IRL mode.
      
      Without this patch the r8a7779 SoC code does
      not fully support external IRQ pins in individual
      IRQ mode. The r8a7779 PFC code does not yet have
      gpio_to_irq() support so no need to update such
      code.
      
      At this point the DT reference implementations
      are not covered. In the future such code shall
      tie in the INTC External IRQ pin driver via
      DT, so this kind of verbose code is not needed
      for the long term DT case.
      Signed-off-by: NMagnus Damm <damm@opensource.se>
      Tested-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
      Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      8e56e6d5
    • M
      ARM: shmobile: INTC External IRQ pin driver on sh73a0 · 341eb546
      Magnus Damm 提交于
      Adjust the sh73a0 IRQ code to make use of the
      INTC External IRQ pin driver for external
      interrupt pins IRQ0 -> IRQ31.
      
      This removes quite a bit of special-case code
      in intc-sh73a0.c but the number of lines get
      replaced with platform device information in
      setup-sh73a0.c. The PFC code is also adjusted
      to make gpio_to_irq() return the correct
      interrupt number.
      
      At this point the DT reference implementations
      are not covered. In the future such code shall
      tie in the INTC External IRQ pin driver via
      DT, so this kind of verbose code is not needed
      for the long term DT case.
      Signed-off-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      341eb546
  2. 08 11月, 2012 2 次提交
  3. 06 11月, 2012 2 次提交
  4. 30 10月, 2012 3 次提交
  5. 14 10月, 2012 1 次提交
    • R
      ARM: config: sort select statements alphanumerically · b1b3f49c
      Russell King 提交于
      As suggested by Andrew Morton:
      
        This is a pet peeve of mine.  Any time there's a long list of items
        (header file inclusions, kconfig entries, array initalisers, etc) and
        someone wants to add a new item, they *always* go and stick it at the
        end of the list.
      
        Guys, don't do this.  Either put the new item into a randomly-chosen
        position or, probably better, alphanumerically sort the list.
      
      lets sort all our select statements alphanumerically.  This commit was
      created by the following perl:
      
      while (<>) {
      	while (/\\\s*$/) {
      		$_ .= <>;
      	}
      	undef %selects if /^\s*config\s+/;
      	if (/^\s+select\s+(\w+).*/) {
      		if (defined($selects{$1})) {
      			if ($selects{$1} eq $_) {
      				print STDERR "Warning: removing duplicated $1 entry\n";
      			} else {
      				print STDERR "Error: $1 differently selected\n".
      					"\tOld: $selects{$1}\n".
      					"\tNew: $_\n";
      				exit 1;
      			}
      		}
      		$selects{$1} = $_;
      		next;
      	}
      	if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or
      			  /^endif/ or /^endchoice/)) {
      		foreach $k (sort (keys %selects)) {
      			print "$selects{$k}";
      		}
      		undef %selects;
      	}
      	print;
      }
      if (%selects) {
      	foreach $k (sort (keys %selects)) {
      		print "$selects{$k}";
      	}
      }
      
      It found two duplicates:
      
      Warning: removing duplicated S5P_SETUP_MIPIPHY entry
      Warning: removing duplicated HARDIRQS_SW_RESEND entry
      
      and they are identical duplicates, hence the shrinkage in the diffstat
      of two lines.
      
      We have four testers reporting success of this change (Tony, Stephen,
      Linus and Sekhar.)
      Acked-by: NJason Cooper <jason@lakedaemon.net>
      Acked-by: NTony Lindgren <tony@atomide.com>
      Acked-by: NStephen Warren <swarren@nvidia.com>
      Acked-by: NLinus Walleij <linus.walleij@linaro.org>
      Acked-by: NSekhar Nori <nsekhar@ti.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      b1b3f49c
  6. 12 7月, 2012 1 次提交
  7. 07 7月, 2012 1 次提交
  8. 30 6月, 2012 1 次提交
  9. 20 6月, 2012 1 次提交
  10. 25 5月, 2012 1 次提交
  11. 18 5月, 2012 4 次提交
  12. 15 5月, 2012 2 次提交
  13. 13 5月, 2012 2 次提交
  14. 13 4月, 2012 1 次提交
  15. 26 1月, 2012 1 次提交
  16. 09 1月, 2012 2 次提交
  17. 11 11月, 2011 3 次提交
  18. 05 11月, 2011 1 次提交
  19. 29 8月, 2011 1 次提交
  20. 20 1月, 2011 1 次提交
  21. 14 1月, 2011 1 次提交
  22. 22 12月, 2010 1 次提交
  23. 29 11月, 2010 1 次提交
  24. 26 11月, 2010 1 次提交
  25. 19 11月, 2010 2 次提交
  26. 18 11月, 2010 1 次提交
    • M
      ARM: mach-shmobile: Initial AG5 and AG5EVM support · 6d9598e2
      Magnus Damm 提交于
      This patch adds initial support for Renesas SH-Mobile AG5.
      
      At this point the AG5 CPU support is limited to the ARM
      core, SCIF serial and a CMT timer together with L2 cache
      and the GIC. The AG5EVM board also supports Ethernet.
      
      Future patches will add support for GPIO, INTCS, CPGA
      and platform data / driver updates for devices such as
      IIC, LCDC, FSI, KEYSC, CEU and SDHI among others.
      
      The code in entry-macro.S will be cleaned up when the
      ARM IRQ demux code improvements have been merged.
      
      Depends on the AG5EVM mach-type recently registered but
      not yet present in arch/arm/tools/mach-types.
      
      As the AG5EVM board comes with 512MiB memory it is
      recommended to turn on HIGHMEM.
      
      Many thanks to Yoshii-san for initial bring up.
      Signed-off-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      6d9598e2