1. 22 7月, 2010 2 次提交
  2. 21 7月, 2010 1 次提交
    • Y
      x86, numa: fix boot without RAM on node0 again · 9aebbdb6
      Yinghai Lu 提交于
      Commit e534c7c5 ("numa: x86_64: use generic percpu var
      numa_node_id() implementation") broke numa systems that don't have ram
      on node0 when MEMORY_HOTPLUG is enabled, because cpu_up() will call
      cpu_to_node() before per_cpu(numa_node) is setup for APs.
      
      When Node0 doesn't have RAM, on x86, cpus already round it to nearest
      node with RAM in x86_cpu_to_node_map.  and per_cpu(numa_node) is not set
      up until in c_init for APs.
      
      When later cpu_up() calling cpu_to_node() will get 0 again, and make it
      online even there is no RAM on node0.  so later all APs can not booted up,
      and later will have panic.
      
      [    1.611101] On node 0 totalpages: 0
      .........
      [    2.608558] On node 0 totalpages: 0
      [    2.612065] Brought up 1 CPUs
      [    2.615199] Total of 1 processors activated (3990.31 BogoMIPS).
      ...
         93.225341] calling  loop_init+0x0/0x1a4 @ 1
      [   93.229314] PERCPU: allocation failed, size=80 align=8, failed to populate
      [   93.246539] Pid: 1, comm: swapper Tainted: G        W   2.6.35-rc4-tip-yh-04371-gd64e6c4-dirty #354
      [   93.264621] Call Trace:
      [   93.266533]  [<ffffffff81125e43>] pcpu_alloc+0x83a/0x8e7
      [   93.270710]  [<ffffffff81125f15>] __alloc_percpu+0x10/0x12
      [   93.285849]  [<ffffffff8140786c>] alloc_disk_node+0x94/0x16d
      [   93.291811]  [<ffffffff81407956>] alloc_disk+0x11/0x13
      [   93.306157]  [<ffffffff81503e51>] loop_alloc+0xa7/0x180
      [   93.310538]  [<ffffffff8277ef48>] loop_init+0x9b/0x1a4
      [   93.324909]  [<ffffffff8277eead>] ? loop_init+0x0/0x1a4
      [   93.329650]  [<ffffffff810001f2>] do_one_initcall+0x57/0x136
      [   93.345197]  [<ffffffff827486d0>] kernel_init+0x184/0x20e
      [   93.348146]  [<ffffffff81034954>] kernel_thread_helper+0x4/0x10
      [   93.365194]  [<ffffffff81c7cc3c>] ? restore_args+0x0/0x30
      [   93.369305]  [<ffffffff8274854c>] ? kernel_init+0x0/0x20e
      [   93.386011]  [<ffffffff81034950>] ? kernel_thread_helper+0x0/0x10
      [   93.392047] loop: out of memory
      ...
      
      Try to assign per_cpu(numa_node) early
      
      [akpm@linux-foundation.org: tidy up code comment]
      Signed-off-by: NYinghai <yinghai@kernel.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: Tejun Heo <tj@kernel.org>
      Cc: Denys Vlasenko <vda.linux@googlemail.com>
      Acked-by: NLee Schermerhorn <lee.schermerhorn@hp.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      9aebbdb6
  3. 19 7月, 2010 1 次提交
  4. 17 7月, 2010 1 次提交
    • Y
      x86: Fix x2apic preenabled system with kexec · fd19dce7
      Yinghai Lu 提交于
      Found one x2apic system kexec loop test failed
      when CONFIG_NMI_WATCHDOG=y (old) or CONFIG_LOCKUP_DETECTOR=y (current tip)
      
      first kernel can kexec second kernel, but second kernel can not kexec third one.
      
      it can be duplicated on another system with BIOS preenabled x2apic.
      First kernel can not kexec second kernel.
      
      It turns out, when kernel boot with pre-enabled x2apic, it will not execute
      disable_local_APIC on shutdown path.
      
      when init_apic_mappings() is called in setup_arch, it will skip setting of
      apic_phys when x2apic_mode is set. ( x2apic_mode is much early check_x2apic())
      Then later, disable_local_APIC() will bail out early because !apic_phys.
      
      So check !x2apic_mode in x2apic_mode in disable_local_APIC with !apic_phys.
      
      another solution could be updating init_apic_mappings() to set apic_phys even
      for preenabled x2apic system. Actually even for x2apic system, that lapic
      address is mapped already in early stage.
      
      BTW: is there any x2apic preenabled system with apicid of boot cpu > 255?
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      LKML-Reference: <4C3EB22B.3000701@kernel.org>
      Acked-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Cc: stable@kernel.org
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      fd19dce7
  5. 15 7月, 2010 1 次提交
  6. 08 7月, 2010 3 次提交
  7. 05 7月, 2010 1 次提交
    • C
      perf, x86: P4 PMU -- redesign cache events · 39ef13a4
      Cyrill Gorcunov 提交于
      To support cache events we have reserved the low 6 bits in
      hw_perf_event::config (which is a part of CCCR register
      configuration actually).
      
      These bits represent Replay Event mertic enumerated in
      enum P4_PEBS_METRIC. The caller should not care about
      which exact bits should be set and how -- the caller
      just chooses one P4_PEBS_METRIC entity and puts it into
      the config. The kernel will track it and set appropriate
      additional MSR registers (metrics) when needed.
      
      The reason for this redesign was the PEBS enable bit, which
      should not be set until DS (and PEBS sampling) support will
      be implemented properly.
      
      TODO
      ====
      
       - PEBS sampling (note it's tricky and works with _one_ counter only
         so for HT machines it will be not that easy to handle both threads)
      
       - tracking of PEBS registers state, a user might need to turn
         PEBS off completely (ie no PEBS enable, no UOP_tag) but some
         other event may need it, such events clashes and should not
         run simultaneously, at moment we just don't support such events
      
       - eventually export user space bits in separate header which will
         allow user apps to configure raw events more conveniently.
      Signed-off-by: NCyrill Gorcunov <gorcunov@openvz.org>
      Signed-off-by: NLin Ming <ming.m.lin@intel.com>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      LKML-Reference: <1278295769.9540.15.camel@minggr.sh.intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      39ef13a4
  8. 03 7月, 2010 1 次提交
  9. 01 7月, 2010 1 次提交
  10. 30 6月, 2010 1 次提交
    • F
      x86: Send a SIGTRAP for user icebp traps · a1e80faf
      Frederic Weisbecker 提交于
      Before we had a generic breakpoint layer, x86 used to send a
      sigtrap for any debug event that happened in userspace,
      except if it was caused by lazy dr7 switches.
      
      Currently we only send such signal for single step or breakpoint
      events.
      
      However, there are three other kind of debug exceptions:
      
      - debug register access detected: trigger an exception if the
        next instruction touches the debug registers. We don't use
        it.
      - task switch, but we don't use tss.
      - icebp/int01 trap. This instruction (0xf1) is undocumented and
        generates an int 1 exception. Unlike single step through TF
        flag, it doesn't set the single step origin of the exception
        in dr6.
      
      icebp then used to be reported in userspace using trap signals
      but this have been incidentally broken with the new breakpoint
      code. Reenable this. Since this is the only debug event that
      doesn't set anything in dr6, this is all we have to check.
      
      This fixes a regression in Wine where World Of Warcraft got broken
      as it uses this for software protection checks purposes. And
      probably other apps do.
      Reported-and-tested-by: NAlexandre Julliard <julliard@winehq.org>
      Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Prasad <prasad@linux.vnet.ibm.com>
      Cc: 2.6.33.x 2.6.34.x <stable@kernel.org>
      a1e80faf
  11. 29 6月, 2010 1 次提交
    • M
      kprobes/x86: Fix kprobes to skip prefixes correctly · 567a9fd8
      Masami Hiramatsu 提交于
      Fix resume_execution() and is_IF_modifier() to skip x86
      instruction prefixes correctly by using x86 instruction
      attribute.
      
      Without this fix, resume_execution() can't handle instructions
      which have non-REX prefixes (REX prefixes are skipped). This
      will cause unexpected kernel panic by hitting bad address when a
      kprobe hits on two-byte ret (e.g. "repz ret" generated for
      Athlon/K8 optimization), because it just checks "repz" and can't
      recognize the "ret" instruction.
      
      These prefixes can be found easily with x86 instruction
      attribute. This patch introduces skip_prefixes() and uses it in
      resume_execution() and is_IF_modifier() to skip prefixes.
      Signed-off-by: NMasami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
      Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
      LKML-Reference: <4C298A6E.8070609@hitachi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      567a9fd8
  12. 25 6月, 2010 3 次提交
    • D
      x86, Calgary: Increase max PHB number · 499a00e9
      Darrick J. Wong 提交于
      Newer systems (x3950M2) can have 48 PHBs per chassis and 8
      chassis, so bump the limits up and provide an explanation
      of the requirements for each class.
      Signed-off-by: NDarrick J. Wong <djwong@us.ibm.com>
      Acked-by: NMuli Ben-Yehuda <muli@il.ibm.com>
      Cc: Corinna Schultz <cschultz@linux.vnet.ibm.com>
      Cc: <stable@kernel.org>
      LKML-Reference: <20100624212647.GI15515@tux1.beaverton.ibm.com>
      [ v2: Fixed build bug, added back PHBS_PER_CALGARY == 4 ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      499a00e9
    • F
      x86: Support for instruction breakpoints · f7809daf
      Frederic Weisbecker 提交于
      Instruction breakpoints need to have a specific length of 0 to
      be working. Bring this support but also take care the user is not
      trying to set an unsupported length, like a range breakpoint for
      example.
      Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Prasad <prasad@linux.vnet.ibm.com>
      Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Jason Wessel <jason.wessel@windriver.com>
      f7809daf
    • F
      x86: Set resume bit before returning from breakpoint exception · 0c4519e8
      Frederic Weisbecker 提交于
      Instruction breakpoints trigger before the instruction executes,
      and returning back from the breakpoint handler brings us again
      to the instruction that breakpointed. This naturally bring to
      a breakpoint recursion.
      
      To solve this, x86 has the Resume Bit trick. When the cpu flags
      have the RF flag set, the next instruction won't trigger any
      instruction breakpoint, and once this instruction is executed,
      RF is cleared back.
      
      This let's us jump back to the instruction that triggered the
      breakpoint without recursion.
      
      Use this when an instruction breakpoint triggers.
      Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Prasad <prasad@linux.vnet.ibm.com>
      Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Jason Wessel <jason.wessel@windriver.com>
      0c4519e8
  13. 20 6月, 2010 1 次提交
  14. 18 6月, 2010 1 次提交
  15. 10 6月, 2010 3 次提交
  16. 09 6月, 2010 7 次提交
    • O
      x86: Unify save_stack_address() and save_stack_address_nosched() · 018378c5
      Oleg Nesterov 提交于
      Cleanup. Factor the common code in save_stack_address() and
      save_stack_address_nosched().
      Signed-off-by: NOleg Nesterov <oleg@redhat.com>
      Cc: Roland McGrath <roland@redhat.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Vegard Nossum <vegard.nossum@gmail.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      LKML-Reference: <20100603193243.GA31534@redhat.com>
      Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
      018378c5
    • O
      x86: Make save_stack_address() !CONFIG_FRAME_POINTER friendly · 147ec4d2
      Oleg Nesterov 提交于
      If CONFIG_FRAME_POINTER=n, print_context_stack() shouldn't neglect the
      non-reliable addresses on stack, this is all we have if dump_trace(bp)
      is called with the wrong or zero bp.
      
      For example, /proc/pid/stack doesn't work if CONFIG_FRAME_POINTER=n.
      
      This patch obviously has no effect if CONFIG_FRAME_POINTER=y, otherwise
      it reverts 1650743c "x86: don't save unreliable stack trace entries".
      
      Also, remove the unnecessary type-cast.
      Signed-off-by: NOleg Nesterov <oleg@redhat.com>
      Cc: Roland McGrath <roland@redhat.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Vegard Nossum <vegard.nossum@gmail.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      LKML-Reference: <20100603193239.GA31530@redhat.com>
      Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
      147ec4d2
    • P
      perf: Convert perf_event to local_t · e7850595
      Peter Zijlstra 提交于
      Since now all modification to event->count (and ->prev_count
      and ->period_left) are local to a cpu, change then to local64_t so we
      avoid the LOCK'ed ops.
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      LKML-Reference: <new-submission>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e7850595
    • C
      perf, x86: Make a second write to performance counter if needed · 68aa00ac
      Cyrill Gorcunov 提交于
      On Netburst PMU we need a second write to a performance counter
      due to cpu erratum.
      
      A simple flag test instead of alternative instructions was choosen
      because wrmsrl is already a macro and if virtualization is turned
      on will need an additional wrapper call which is more expencise.
      
      nb: we should propably switch to jump-labels as only this facility
      reach the mainline.
      Signed-off-by: NCyrill Gorcunov <gorcunov@openvz.org>
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Robert Richter <robert.richter@amd.com>
      Cc: Lin Ming <ming.m.lin@intel.com>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      LKML-Reference: <20100602212304.GC5264@lenovo>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      68aa00ac
    • P
      perf: Cleanup {start,commit,cancel}_txn details · 8d2cacbb
      Peter Zijlstra 提交于
      Clarify some of the transactional group scheduling API details
      and change it so that a successfull ->commit_txn also closes
      the transaction.
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Mike Galbraith <efault@gmx.de>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      LKML-Reference: <1274803086.5882.1752.camel@twins>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      8d2cacbb
    • F
      perf: Drop the skip argument from perf_arch_fetch_regs_caller · b0f82b81
      Frederic Weisbecker 提交于
      Drop this argument now that we always want to rewind only to the
      state of the first caller.
      It means frame pointers are not necessary anymore to reliably get
      the source of an event. But this also means we need this helper
      to be a macro now, as an inline function is not an option since
      we need to know when to provide a default implentation.
      Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Cc: David Miller <davem@davemloft.net>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      b0f82b81
    • F
      x86: Unify dumpstack.h and stacktrace.h · c9cf4dbb
      Frederic Weisbecker 提交于
      arch/x86/include/asm/stacktrace.h and arch/x86/kernel/dumpstack.h
      declare headers of objects that deal with the same topic.
      Actually most of the files that include stacktrace.h also include
      dumpstack.h
      
      Although dumpstack.h seems more reserved for internals of stack
      traces, those are quite often needed to define specialized stack
      trace operations. And perf event arch headers are going to need
      access to such low level operations anyway. So don't continue to
      bother with dumpstack.h as it's not anymore about isolated deep
      internals.
      
      v2: fix struct stack_frame definition conflict in sysprof
      Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Soeren Sandmann <sandmann@daimi.au.dk>
      c9cf4dbb
  17. 02 6月, 2010 1 次提交
  18. 01 6月, 2010 2 次提交
  19. 31 5月, 2010 2 次提交
    • A
      x86/mm: Remove unused DBG() macro · e565813a
      Akinobu Mita 提交于
      DBG() macro for CONFIG_DEBUG_PER_CPU_MAPS is unused.
      Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com>
      LKML-Reference: <1274706291-13554-1-git-send-email-akinobu.mita@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e565813a
    • S
      perf_events: Fix event scheduling issues introduced by transactional API · 90151c35
      Stephane Eranian 提交于
      The transactional API patch between the generic and model-specific
      code introduced several important bugs with event scheduling, at
      least on X86. If you had pinned events, e.g., watchdog,  and were
      over-committing the PMU, you would get bogus counts. The bug was
      showing up on Intel CPU because events would move around more
      often that on AMD. But the problem also existed on AMD, though
      harder to expose.
      
      The issues were:
      
       - group_sched_in() was missing a cancel_txn() in the error path
      
       - cpuc->n_added was not properly maintained, leading to missing
         actions in hw_perf_enable(), i.e., n_running being 0. You cannot
         update n_added until you know the transaction has succeeded. In
         case of failed transaction n_added was not adjusted back.
      
       - in case of failed transactions, event_sched_out() was called
         and eventually invoked x86_disable_event() to touch the HW reg.
         But with transactions, on X86, event_sched_in() does not touch
         HW registers, it simply collects events into a list. Thus, you
         could end up calling x86_disable_event() on a counter which
         did not correspond to the current event when idx != -1.
      
      The patch modifies the generic and X86 code to avoid all those problems.
      
      First, we keep track of the number of events added last. In case the
      transaction fails, we substract them from n_added. This approach is
      necessary (as opposed to delaying updates to n_added) because not all
      event updates use the transaction API, e.g., single events.
      
      Second, we encapsulate the event_sched_in() and event_sched_out() in
      group_sched_in() inside the transaction. That makes the operations
      symmetrical and you can also detect that you are inside a transaction
      and skip the HW reg access by checking cpuc->group_flag.
      
      With this patch, you can now overcommit the PMU even with pinned
      system-wide events present and still get valid counts.
      Signed-off-by: NStephane Eranian <eranian@google.com>
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      LKML-Reference: <1274796225.5882.1389.camel@twins>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      90151c35
  20. 28 5月, 2010 3 次提交
  21. 27 5月, 2010 1 次提交
  22. 26 5月, 2010 2 次提交
    • B
      x86, k8: Fix section mismatch for powernowk8_exit() · fe501f1e
      Borislav Petkov 提交于
      Fix the following warning:
      
      "WARNING: arch/x86/kernel/built-in.o(.exit.text+0x72):
      Section mismatch in reference from the function powernowk8_exit() to the variable .cpuinit.data:cpb_nb
      
      The function __exit powernowk8_exit() references a variable
      __cpuinitdata cpb_nb. This is often seen when error handling in the exit
      function uses functionality in the init path. The fix is often to remove
      the __cpuinitdata annotation of cpb_nb so it may be used outside an init
      section."
      
      Cc: <stable@kernel.org>
      Reported-by: NH. Peter Anvin <hpa@zytor.com>
      Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
      LKML-Reference: <20100525152858.GA24836@aftab>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      fe501f1e
    • K
      driver core: add devname module aliases to allow module on-demand auto-loading · 578454ff
      Kay Sievers 提交于
      This adds:
        alias: devname:<name>
      to some common kernel modules, which will allow the on-demand loading
      of the kernel module when the device node is accessed.
      
      Ideally all these modules would be compiled-in, but distros seems too
      much in love with their modularization that we need to cover the common
      cases with this new facility. It will allow us to remove a bunch of pretty
      useless init scripts and modprobes from init scripts.
      
      The static device node aliases will be carried in the module itself. The
      program depmod will extract this information to a file in the module directory:
        $ cat /lib/modules/2.6.34-00650-g537b60d1-dirty/modules.devname
        # Device nodes to trigger on-demand module loading.
        microcode cpu/microcode c10:184
        fuse fuse c10:229
        ppp_generic ppp c108:0
        tun net/tun c10:200
        dm_mod mapper/control c10:235
      
      Udev will pick up the depmod created file on startup and create all the
      static device nodes which the kernel modules specify, so that these modules
      get automatically loaded when the device node is accessed:
        $ /sbin/udevd --debug
        ...
        static_dev_create_from_modules: mknod '/dev/cpu/microcode' c10:184
        static_dev_create_from_modules: mknod '/dev/fuse' c10:229
        static_dev_create_from_modules: mknod '/dev/ppp' c108:0
        static_dev_create_from_modules: mknod '/dev/net/tun' c10:200
        static_dev_create_from_modules: mknod '/dev/mapper/control' c10:235
        udev_rules_apply_static_dev_perms: chmod '/dev/net/tun' 0666
        udev_rules_apply_static_dev_perms: chmod '/dev/fuse' 0666
      
      A few device nodes are switched to statically allocated numbers, to allow
      the static nodes to work. This might also useful for systems which still run
      a plain static /dev, which is completely unsafe to use with any dynamic minor
      numbers.
      
      Note:
      The devname aliases must be limited to the *common* and *single*instance*
      device nodes, like the misc devices, and never be used for conceptually limited
      systems like the loop devices, which should rather get fixed properly and get a
      control node for losetup to talk to, instead of creating a random number of
      device nodes in advance, regardless if they are ever used.
      
      This facility is to hide the mess distros are creating with too modualized
      kernels, and just to hide that these modules are not compiled-in, and not to
      paper-over broken concepts. Thanks! :)
      
      Cc: Greg Kroah-Hartman <gregkh@suse.de>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Miklos Szeredi <miklos@szeredi.hu>
      Cc: Chris Mason <chris.mason@oracle.com>
      Cc: Alasdair G Kergon <agk@redhat.com>
      Cc: Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
      Cc: Ian Kent <raven@themaw.net>
      Signed-Off-By: NKay Sievers <kay.sievers@vrfy.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      578454ff