- 04 4月, 2013 1 次提交
-
-
由 Ludovic Desroches 提交于
Add the ADC low and high resolution configuration and which one to use. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
- 12 1月, 2013 1 次提交
-
-
由 Bo Shen 提交于
Add pinctrl support for SSC on AT91 dtsi files. Signed-off-by: NBo Shen <voice.shen@atmel.com> [nicolas.ferre@atmel.com: split dtsi and driver changes] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Reluctantly-acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
- 15 12月, 2012 1 次提交
-
-
由 Bo Shen 提交于
Change the value of status to disabled to keep the consistent Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
- 20 11月, 2012 2 次提交
-
-
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
由 Ludovic Desroches 提交于
Add mci controller nodes to atmel SOCs. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
- 19 11月, 2012 3 次提交
-
-
as we just use the rts and not the rts & cts for rs485 Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
USART are the full pin uart DBGU the debug Unit UART the two pin uart Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
- 16 11月, 2012 1 次提交
-
-
由 Fabio Porcedda 提交于
Tested on an at91sam9260 board (evk-pro3). Signed-off-by: NFabio Porcedda <fabio.porcedda@gmail.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
- 07 11月, 2012 1 次提交
-
-
由 Bo Shen 提交于
Add atmel-ssc for device tree support Match "atmel,at91rm9200-ssc" for using pdc for data transfer Match "atmel,at91sam9g45-ssc" for using dma for data transfer Signed-off-by: NBo Shen <voice.shen@atmel.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
- 13 10月, 2012 4 次提交
-
-
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
Set the dbgu pinctrl config by default as we have only one possible config For other uart set the rxd/txd by default. For at91sam9x5ek create soc based dts as we need to include specific soc dtsi. Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
Fix also the reg size as we have 512 bytes bank not 256 bytes per gpio/mux controller Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
- 17 9月, 2012 1 次提交
-
-
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Tested-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
- 12 9月, 2012 1 次提交
-
-
由 Ludovic Desroches 提交于
Add TWI nodes for atmel SoCs but keep i2c-gpio ones in order to let the choice to the user in dts files. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
-
- 02 7月, 2012 2 次提交
-
-
由 Ludovic Desroches 提交于
Add a third cell to define irq priority. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Reviewed-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
- 18 5月, 2012 1 次提交
-
-
由 Nicolas Ferre 提交于
Now that the bulk of at91sam9g20-related nodes are located in at91sam9260.dtsi, we have to re-create the path to this ADC node for SoC specific parts. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-
- 20 4月, 2012 1 次提交
-
-
The at91sam9260 and at91sam9g20 share most of the same IP. So udpate the node property in the at91sam9g20 only. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
- 15 4月, 2012 1 次提交
-
-
由 Rob Herring 提交于
These were incorrectly introduced and can cause problems for of_irq_init. The correct way to define a root controller is no interrupt-parent set at all or the interrupt-parent is set to the root controller itself when inherited from a parent node. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Tested-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 05 4月, 2012 1 次提交
-
-
由 Ludovic Desroches 提交于
Because of the inclusion of skeleton.dtsi, the memory node is named "memory" we where not modifying the already included one but creating a new one. It caused bad memory node detection during early_init_dt_scan_memory() so we modify them. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: devicetree-discuss@lists.ozlabs.org
-
- 16 3月, 2012 2 次提交
-
-
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: devicetree-discuss@lists.ozlabs.org
-
- 15 3月, 2012 6 次提交
-
-
Use a string to specific the wakeup mode to make it more readable. Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5. Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
We can now drop the call to ioremap_registers() as we have the binding for the SDRAM/DDR Controller. Drop ioremap_registers() for sam9x5 too. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
Specified the main Oscillator via clock binding. This will allow to do not hardcode it anymore in the DT board at 12MHz. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
For now on use i2c-gpio driver on the same pin as the hardware IP. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NRob Herring <rob.herring@calxeda.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
-
Use a local copy of board informatin and fill with DT data. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
-
- 01 3月, 2012 4 次提交
-
-
由 Nicolas Ferre 提交于
Device tree support added to atmel_tclib: the generic Timer Counter library. This is used by the clocksource/clockevent driver tcb_clksrc. The current DT enabled platforms are also modified to use it: - .dtsi files are modified to add Timer Counter Block entries - alias are created to allow identification of each block - clkdev lookup tables are added for clocks identification. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca>
-
Retreive registers address and IRQ from device tree entry. Called from at91_dt_init_irq() so that timers are up-n-running when timers initialization will occur. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> [nicolas.ferre@atmel.com: change error path and interrupts property handling] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
由 Nicolas Ferre 提交于
Add "legacy" type of irqdomain to preserve old-style numbering and allow smooth transition for both DT and non-DT cases. Original idea and code by Jean-Christophe Plagniol-Villard. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
由 Nicolas Ferre 提交于
Add an irqdomain for the AIC interrupt controller. The device tree support is mapping the registers and is using the irq_domain_add_legacy() to manage hwirq translation. The documentation is describing the meaning of the two cells required for using this "interrupt-controller" in a device tree node. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
- 16 12月, 2011 1 次提交
-
-
由 Nicolas Ferre 提交于
Add the Cadence macb ethernet controller in at91sam9g45 and at91sam9g20 .dtsi and enable it in at91sam9m10g45ek and usb_a9g20 board device tree file. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
- 25 10月, 2011 2 次提交
-
-
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: NRob Herring <rob.herring@calxeda.com>
-
由 Nicolas Ferre 提交于
Create a new device tree source file for Atmel at91sam9g45 SoC family. The Evaluation Kit at91sam9m10g45ek includes it. This first basic support will be populated as drivers and boards will be converted to device tree. Contains serial, dma and interrupt controllers. The generic board file still takes advantage of platform data for early serial init. As we need a storage media and the NAND flash driver is not converted to DT yet, we keep old initialization for it. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: NRob Herring <rob.herring@calxeda.com>
-