- 04 4月, 2013 3 次提交
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由 Ludovic Desroches 提交于
Add the ADC low and high resolution configuration and which one to use. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Douglas Gilbert 提交于
Signed-off-by: NDouglas Gilbert <dgilbert@interlog.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Macb0 node cannot be activated in generic sam9x5ek.dtsi file as the sam9g15 does not have one. Move the macb0 & macb1 activation in board .dts file that support them. Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 26 3月, 2013 3 次提交
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由 Nicolas Ferre 提交于
Remove the malformed "mem=" bootargs parameter in at91sam9x5ek.dtsi Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> # 3.8+
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由 Nicolas Ferre 提交于
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> # 3.8+
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由 Nicolas Ferre 提交于
- unneeded whitespace - missing double quote Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> # 3.8+
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- 22 3月, 2013 1 次提交
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 21 3月, 2013 8 次提交
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由 Richard Genoud 提交于
This add the 1-wire chip present on the CM board to the DTS. As the pin is also used by leds, it's disabled by default. If the board really wants it, it can be enabled in the board DTS. Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Richard Genoud 提交于
On at91sam9x5ek, macb0 is enabled, so it conflicts with i2c2 (PB4) same for i2c1, (conflicts with LCD). Moreover, only i2c0 is used on this board. Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Gpio-keys nodes are not using the "reg" property in their sub nodes. So, there is no need to define #address-cells and #size-cells properties in gpio-keys nodes: we remove them. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Joachim Eastwood 提交于
Signed-off-by: NJoachim Eastwood <manabian@gmail.com> [nicolas.ferre@atmel.com: remove unneeded address-cells and size-cells to gpio-keys] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Joachim Eastwood 提交于
GPIO pins used by i2c-gpio must be set to multi drive (open drain) to work properly. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Joachim Eastwood 提交于
Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Richard Genoud 提交于
i2c-gpio is sometimes used in place of i2c-at91. This adds the pin muxes for the gpios. Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Richard Genoud 提交于
This adds the at19 i2c controller pin muxes for at91sam9x5 based boards. Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 18 3月, 2013 1 次提交
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由 Linus Torvalds 提交于
Commit 1d9d8639 ("perf,x86: fix kernel crash with PEBS/BTS after suspend/resume") fixed a crash when doing PEBS performance profiling after resuming, but in using init_debug_store_on_cpu() to restore the DS_AREA mtrr it also resulted in a new WARN_ON() triggering. init_debug_store_on_cpu() uses "wrmsr_on_cpu()", which in turn uses CPU cross-calls to do the MSR update. Which is not really valid at the early resume stage, and the warning is quite reasonable. Now, it all happens to _work_, for the simple reason that smp_call_function_single() ends up just doing the call directly on the CPU when the CPU number matches, but we really should just do the wrmsr() directly instead. This duplicates the wrmsr() logic, but hopefully we can just remove the wrmsr_on_cpu() version eventually. Reported-and-tested-by: NParag Warudkar <parag.lkml@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 16 3月, 2013 1 次提交
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由 Stephane Eranian 提交于
This patch fixes a kernel crash when using precise sampling (PEBS) after a suspend/resume. Turns out the CPU notifier code is not invoked on CPU0 (BP). Therefore, the DS_AREA (used by PEBS) is not restored properly by the kernel and keeps it power-on/resume value of 0 causing any PEBS measurement to crash when running on CPU0. The workaround is to add a hook in the actual resume code to restore the DS Area MSR value. It is invoked for all CPUS. So for all but CPU0, the DS_AREA will be restored twice but this is harmless. Reported-by: NLinus Torvalds <torvalds@linux-foundation.org> Signed-off-by: NStephane Eranian <eranian@google.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 14 3月, 2013 2 次提交
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由 Marek Szyprowski 提交于
Atomic pool should always be allocated from DMA zone if such zone is available in the system to avoid issues caused by limited dma mask of any of the devices used for making an atomic allocation. Reported-by: NKrzysztof Halasa <khc@pm.waw.pl> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Cc: Stable <stable@vger.kernel.org> [v3.6+]
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由 David Howells 提交于
In the UAPI header files, __BIG_ENDIAN and __LITTLE_ENDIAN must be compared against __BYTE_ORDER in preprocessor conditionals where these are exposed to userspace (that is they're not inside __KERNEL__ conditionals). However, in the main kernel the norm is to check for "defined(__XXX_ENDIAN)" rather than comparing against __BYTE_ORDER and this has incorrectly leaked into the userspace headers. The definition of struct stat64 in M32R's asm/stat.h is wrong in this way. Note that userspace will likely interpret the field order incorrectly as the big-endian variant on little-endian machines - depending on header inclusion order. [!!!] NOTE [!!!] This patch may adversely change the userspace API. It might be better to fix the ordering of st_blocks and __pad4 in struct stat64. Signed-off-by: NDavid Howells <dhowells@redhat.com> Cc: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 13 3月, 2013 4 次提交
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由 Jonas Bonn 提交于
The OpenRISC arch doesn't actually have the virt_to_bus methods Signed-off-by: NJonas Bonn <jonas@southpole.se>
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由 Jonas Bonn 提交于
The recent move to GPIO descriptors breaks the OpenRISC build. Requiring gpiolib resolves this; using gpiolib exclusively is also the recommended way forward for all arches by the developers working on these GPIO changes. The non-gpiolib implementation for OpenRISC never worked anyway... Signed-off-by: NJonas Bonn <jonas@southpole.se>
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由 Johan Hovold 提交于
Fix regression introduced by commit d2323cf7 ("onewire: w1-gpio: add ext_pullup_enable pin in platform data") which added a gpio entry to the platform data, but did not add the required initialisers to the board files using it. Consequently, the driver would request gpio 0 at probe, which could break other uses of the corresponding pin. On AT91 requesting gpio 0 changes the pin muxing for PIOA0, which, for instance, breaks SPI0 on at91sam9g20. Cc: stable <stable@vger.kernel.org> Signed-off-by: NJohan Hovold <jhovold@gmail.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Stephen Rothwell 提交于
In commit 887cbce0 ("arch Kconfig: centralise ARCH_NO_VIRT_TO_BUS") I introduced the config sybmol HAVE_VIRT_TO_BUS and selected that where needed. I am not sure what I was thinking. Instead, just directly select VIRT_TO_BUS where it is needed. Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 12 3月, 2013 5 次提交
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由 Arnd Bergmann 提交于
The definitions have move around recently, causing build errors in spear3xx for all configurations: spear3xx.c:47:5: error: 'PL080_BSIZE_16' undeclared here (not in a function) spear3xx.c:47:23: error: 'PL080_CONTROL_SB_SIZE_SHIFT' undeclared here (not in a function) spear3xx.c:48:22: error: 'PL080_CONTROL_DB_SIZE_SHIFT' undeclared here (not in a function) Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Alessandro Rubini <rubini@gnudd.com> Cc: Viresh Kumar <viresh.kumar@linaro.org>
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由 Arnd Bergmann 提交于
The ab8500 device is a child of the prcmu device, which is a memory mapped bus device, whose children are addressable using physical memory addresses, not using mailboxes, so a mailbox number in the ab8500 node cannot be parsed by DT. Nothing uses this number, since it was only introduced as part of the failed attempt to clean up prcmu mailbox handling, and we can simply remove it. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
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由 Padmavathi Venna 提交于
This patch adds #dma-cells property to PL330 DMA controller nodes for supporting generic dma dt bindings on SOCFPGA platform. #dma-channels and #dma-requests are not required now but added in advance. Signed-off-by: NPadmavathi Venna <padma.v@samsung.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Maxime Ripard 提交于
When building a multiplatform kernel, we could end up with a smaller number of GPIOs than the one required by the platform the kernel was running on. Sort the max GPIO number by descending order so that we always take the highest number required. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Ian Campbell 提交于
Rob Herring has observed that c81611c4 "xen: event channel arrays are xen_ulong_t and not unsigned long" introduced a compile failure when building without CONFIG_AEABI: /tmp/ccJaIZOW.s: Assembler messages: /tmp/ccJaIZOW.s:831: Error: even register required -- `ldrexd r5,r6,[r4]' Will Deacon pointed out that this is because OABI does not require even base registers for 64-bit values. We can avoid this by simply using the existing atomic64_xchg operation and the same containerof trick as used by the cmpxchg macros. However since this code is used on memory which is shared with the hypervisor we require proper atomic instructions and cannot use the generic atomic64 callbacks (which are based on spinlocks), therefore add a dependency on !GENERIC_ATOMIC64. Since we already depend on !CPU_V6 there isn't much downside to this. While thinking about this we also observed that OABI has different struct alignment requirements to EABI, which is a problem for hypercall argument structs which are shared with the hypervisor and which must be in EABI layout. Since I don't expect people to want to run OABI kernels on Xen depend on CONFIG_AEABI explicitly too (although it also happens to be enforced by the !GENERIC_ATOMIC64 requirement too). Signed-off-by: NIan Campbell <ian.campbell@citrix.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Rob Herring <robherring2@gmail.com> Acked-by: NStefano Stabellini <Stefano.Stabellini@eu.citrix.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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- 11 3月, 2013 8 次提交
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由 Paul Bolle 提交于
Commit f8c95fe6 (ARM: imx: support DEBUG_LL uart port selection for all i.MX SoCs) had a typo that DEBUG_IMX50_IMX53_UART should be DEBUG_IMX53_UART. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Li Zefan 提交于
Commit 877c6856 ("perf: Remove include of cgroup.h from perf_event.h") caused this build failure if PERF_EVENTS is enabled: In file included from arch/s390/include/asm/perf_event.h:9:0, from include/linux/perf_event.h:24, from kernel/events/ring_buffer.c:12: arch/s390/include/asm/cpu_mf.h: In function 'qctri': arch/s390/include/asm/cpu_mf.h:61:12: error: 'EINVAL' undeclared (first use in this function) cpu_mf.h had an implicit errno.h dependency, which was added indirectly via cgroups.h but not anymore. Add it explicitly. Reported-by: NFengguang Wu <fengguang.wu@intel.com> Tested-by: NFengguang Wu <fengguang.wu@intel.com> Signed-off-by: NLi Zefan <lizefan@huawei.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Link: http://lkml.kernel.org/r/51385F79.7000106@huawei.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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由 Richard Weinberger 提交于
The tty below tty_port might get destroyed by the tty layer while we hold a reference to it. So we have to carry tty_port around... Signed-off-by: NRichard Weinberger <richard@nod.at>
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由 Richard Weinberger 提交于
As we setup the SIGWINCH handler in tty_port_operations->activate it makes sense to tear down it in ->destruct. Signed-off-by: NRichard Weinberger <richard@nod.at>
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由 Sergei Trofimovich 提交于
arch/um/os-Linux/signal.c:18:8: error: conflicting types for 'sig_info' In file included from /home/slyfox/linux-2.6/arch/um/os-Linux/signal.c:12:0: arch/um/include/shared/as-layout.h:64:15: note: previous declaration of 'sig_info' was here Signed-off-by: NSergei Trofimovich <slyfox@gentoo.org> CC: Jeff Dike <jdike@addtoit.com> CC: Richard Weinberger <richard@nod.at> CC: "Martin Pärtel" <martin.partel@gmail.com> CC: Al Viro <viro@zeniv.linux.org.uk> CC: user-mode-linux-devel@lists.sourceforge.net CC: user-mode-linux-user@lists.sourceforge.net CC: linux-kernel@vger.kernel.org Signed-off-by: NRichard Weinberger <richard@nod.at>
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由 Sergei Trofimovich 提交于
arch/um/os-Linux/start_up.c: In function 'check_coredump_limit': arch/um/os-Linux/start_up.c:338:16: error: storage size of 'lim' isn't known arch/um/os-Linux/start_up.c:339:2: error: implicit declaration of function 'getrlimit' [-Werror=implicit-function-declaration] Signed-off-by: NSergei Trofimovich <slyfox@gentoo.org> CC: Jeff Dike <jdike@addtoit.com> CC: Richard Weinberger <richard@nod.at> CC: Al Viro <viro@zeniv.linux.org.uk> CC: user-mode-linux-devel@lists.sourceforge.net CC: user-mode-linux-user@lists.sourceforge.net CC: linux-kernel@vger.kernel.org Signed-off-by: NRichard Weinberger <richard@nod.at>
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由 Paul Chavent 提交于
This new version moves the skb_tx_timestamp in the main uml driver. This should avoid the need to call this function in each transport (vde, slirp, tuntap, ...). It also add support for ethtool get_ts_info. Signed-off-by: NPaul Chavent <paul.chavent@onera.fr> Acked-by: NRichard Cochran <richardcochran@gmail.com> Signed-off-by: NRichard Weinberger <richard@nod.at>
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由 Shawn Guo 提交于
We always boot from PLL1, so let's have pll1_sys in the clks_init_on list to have clk prepare/enable use count match the hardware status, so that drivers managing pll1_sys like cpufreq can get the use count right from the start. Reported-by: NDirk Behme <dirk.behme@de.bosch.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 09 3月, 2013 4 次提交
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由 Will Deacon 提交于
Commit ec221208 ("Disintegrate asm/system.h for Alpha") removed the system.h include from boot/head.S, which puts the PAL_* asm constants out of scope. Include <asm/pal.h> so we can get building again. Signed-off-by: NWill Deacon <will.deacon@arm.com> Cc: David Rusling <david.rusling@linaro.org> Cc: David Howells <dhowells@redhat.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Thomas Petazzoni 提交于
The orion5x-lacie-ethernet-disk-mini-v2.dts file was using "marvell-orion5x-88f5182" as a compatible string, while it should have been "marvell,orion5x-88f5182". Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
There is no need to have a #address-cells property in the MPIC Device Tree node, and more than that, having it confuses the of_irq_map_raw() logic, which will be used by the Marvell PCIe driver. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
During the system initialization, the orion_setup_cpu_mbus_target() function reads the SDRAM address decoding registers to find out how many chip-selects of SDRAM have been enabled, and builds a small array with one entry per chip-select. This array is then used by device drivers (XOR, Ethernet, etc.) to configure their own address decoding windows to the SDRAM. However, devices can only access the first 32 bits of the physical memory. Even though LPAE is not supported for now, some Marvell boards are now showing up with 8 GB of RAM, configured using two SDRAM address decoding windows: the first covering the first 4 GB, the second covering the last 4 GB. The array built by orion_setup_cpu_mbus_target() has therefore two entries, and device drivers try to set up two address decoding windows to the SDRAM. However, in the device registers for the address decoding, the base address is only 32 bits, so those two windows overlap each other, and the devices do not work at all. This patch makes sure that the array built by orion_setup_cpu_mbus_target() only contains the SDRAM decoding windows that correspond to the first 4 GB of the memory. To do that, it ignores the SDRAM decoding windows for which the 4 low-order bits are not zero (the 4 low-order bits of the base register are used to store bits 32:35 of the base address, so they actually indicate whether the base address is above 4 GB). This patch allows the newly introduced armada-xp-gp board to properly operate when it is mounted with more than 4 GB of RAM. Without that, all devices doing DMA (for example XOR and Ethernet) do not work at all. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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