- 10 7月, 2012 1 次提交
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由 Gabor Juhos 提交于
Signed-off-by: NGabor Juhos <juhosg@openwrt.org> Acked-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 07 6月, 2012 1 次提交
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由 Zefir Kurtisi 提交于
Updates for spectral scanning register modification for AR93x: * fix bits for spectral_scan_count * add bits for new parameters Signed-off-by: NZefir Kurtisi <zefir.kurtisi@neratec.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 24 4月, 2012 1 次提交
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由 Felix Fietkau 提交于
Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 28 2月, 2012 3 次提交
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由 Sujith Manoharan 提交于
v1.0 chips are not available in the market. Signed-off-by: NSujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Sujith Manoharan 提交于
The LONG_SHIFT_SELECT offset is different for AR9462 from the other chip families. Fix this. Signed-off-by: NSujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Sujith Manoharan 提交于
Using AR_SREV_* macros for setting up the chip-specific NF values will make adding support for new chips hard. Use separate macros for each chip. Currently, AR9462 has the same value for all NF limits. Signed-off-by: NSujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 01 12月, 2011 1 次提交
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由 Mohammed Shafi Shajakhan 提交于
these definitions will be used by MCI state machine and the corresponding hardware code Cc: Wilson Tsao <wtsao@qca.qualcomm.com> Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 12 11月, 2011 1 次提交
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由 Rajkumar Manoharan 提交于
Read and configure quick drop feild from AR9003 eeprom inorder to help with strong signal. This patch also removes obsolate parameters ob, db_stage2, db_stage_3, db_stage4 from the eeprom templates. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 03 11月, 2011 2 次提交
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由 Rajkumar Manoharan 提交于
The commit ce407afc introduced regression for AR9330/AR9340 register offsets. Some of the register offsets are common for AR9330/AR9340/AR9485 except AR9380. Fix that. Cc: stable@kernel.org [3.1.0+] Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
My recent commits (3782c69d, 324c74ad) introduced regression for register offset selection that based on the macversion. Not using parentheses in proper manner for ternary operator leads to select wrong offset for the registers. This issue was observed with AR9462 chip that immediate disconnect after the association with the following message ieee80211 phy3: wlan0: Failed to send nullfunc to AP 00:23:69:12:ea:47 after 500ms, disconnecting. Cc: stable@kernel.org Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 15 10月, 2011 5 次提交
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由 Rajkumar Manoharan 提交于
Renamed to be in sync with Marketing term and to avoid confusion with other chip names. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
Supported calibrations of radio retention table (RTT) are - DC offset - Filter - Peak detect Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
To improve sensitivity for AR9480, the normal and minimum noise floor values of both bands are updated. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
Currently Tx IQ calibration is enabled by default for all AR9003 chips. But for AR9480, the calibration status should be read from chip after processing ini. And also the carrier leak calibration status is checked during init cal. As the init_cal is being called for fast channel change too, the tx_cl status only be read after full reset. Hence moving that into process ini function. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
In order to reduce the overall scan time, fast channel change should be implemented properly. This patch adds fast channel change support across band switch or channel mode switch instead of doing full chip reset. During the fastcc, tx iqcal measurements are preserved and will be reloaded after successful the channel change. This patch also addressed fast channel issue where the STA can not see APs in higher than operating channel on 5GHz band after the association. Cc: Paul Stewart <pstew@google.com> Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 17 9月, 2011 2 次提交
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由 Senthil Balasubramanian 提交于
Move the register macros to appropriate header files to be in sync with other register definitions and also a single place to refer everything. Signed-off-by: NSenthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Senthil Balasubramanian 提交于
Add initvals and register modifications required to support AR946/8x chipsets. Signed-off-by: NSenthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 25 8月, 2011 1 次提交
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由 Rajkumar Manoharan 提交于
The chainmasks were already configured at process_ini before doing init calibration. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 10 8月, 2011 1 次提交
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由 Alex Hacker 提交于
This patch addresses an issue with incorrect HW register AR_PHY_TX_IQCAL_CORR_COEFF_B1 definition which leads to incorrect clibration. Cc: stable@kernel.org Signed-off-by: NAlex Hacker <hacker@epn.ru> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 28 6月, 2011 1 次提交
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由 Mohammed Shafi Shajakhan 提交于
Cc: muddin@qca.qualcomm.com Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 23 6月, 2011 2 次提交
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由 Gabor Juhos 提交于
Signed-off-by: NGabor Juhos <juhosg@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Gabor Juhos 提交于
Signed-off-by: NGabor Juhos <juhosg@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 20 5月, 2011 1 次提交
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由 Sujith Manoharan 提交于
The Times They Are a-Changin'. Signed-off-by: NSujith Manoharan <Sujith.Manoharan@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 17 5月, 2011 1 次提交
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由 Mohammed Shafi Shajakhan 提交于
define few registers and macros to configure/enable Antenna diversity parameters in AR9485 Cc: Gabriel Tseng <Gabriel.Tseng@Atheros.com> Cc: Senthilkumar Balasubramanian <Senthilkumar.Balasubramanian@Atheros.com> Signed-off-by: NMohammed Shafi Shajakhan <mshajakhan@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 27 4月, 2011 1 次提交
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由 Rajkumar Manoharan 提交于
On AR9003 chips, doing three IQ calibrations will possibly cause chip in stuck state. In noisy environment, chip could receive a packet during the middle of three calibrations and it causes the conflict of HW access and the eventual failure. It also causes IQ calibration outliers which results in poor Tx EVM. The IQ Cal procedure is after resetting the chip, run IQ cal 3 times per each cal cycle and find the two closest readings and average of two. The advantage of running Tx IQ cal more than once is that we can compare calibration results for the same gain setting over multiple iterations. Most of the cases the IQ failures were observed after first pass. For the AR9485 and later chips, Tx IQ Calibration is performed along with AGC cal. But for pre-AR9485 chips, Tx IQ cal HW has to be separated from the rest of calibration HW to avoid chip hang. After all calibrations are done in HW, we can start SW post-processing. By doing this way, we minimize the SW difference among all chips. The order of calibration (run IQ cal before other calibration) is also needed to avoid chip hang for chips before AR9485. This issue was originally observed with AR9382. During the issue kernel log was filled with following message ath: timeout (100000 us) on reg 0xa640: 0x00000001 & 0x00000001 != 0x00000000 ath: timeout (100000 us) on reg 0xa2c4: 0x00158dd9 & 0x00000001 != 0x00000000 ath: Unable to reset channel (2412 MHz), reset status -5 ath: Unable to set channel Signed-off-by: NRajkumar Manoharan <rmanoharan@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 26 4月, 2011 1 次提交
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 22 1月, 2011 1 次提交
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由 Felix Fietkau 提交于
Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 14 12月, 2010 1 次提交
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由 Felix Fietkau 提交于
The EEPROM contains scale factors for the tx power, which define the range of allowable difference between target power and training power. If the difference is too big, PA predistortion cannot be used. For 2.4 GHz there is only one scale factor, for 5 GHz there are three, depending on the specific frequency range. Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 08 12月, 2010 8 次提交
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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Right now it is done for only AR9485, will be done for ar9003 also after proper testing. Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 15 6月, 2010 2 次提交
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由 Felix Fietkau 提交于
Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Luis R. Rodriguez 提交于
Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 03 6月, 2010 1 次提交
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由 Luis R. Rodriguez 提交于
The baseband watchdog will monitor blocks of the baseband through timers and will issue an interrupt when things are detected to be stalled. It is only available on the AR9003 family. Cc: Sam Ng <sam.ng@atheros.com> Cc: Paul Shaw <paul.shaw@atheros.com> Cc: Don Breslin <don.breslin@atheros.com> Cc: Cliff Holden <cliff.holden@atheros.com Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 17 4月, 2010 1 次提交
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由 Luis R. Rodriguez 提交于
We add this now as OFDM spur mitigation required accessing the EEPROM for the AR9003 devices. Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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