1. 10 1月, 2011 1 次提交
  2. 25 12月, 2010 2 次提交
  3. 11 12月, 2010 2 次提交
  4. 19 6月, 2010 2 次提交
  5. 13 5月, 2010 1 次提交
  6. 14 1月, 2010 1 次提交
  7. 03 12月, 2009 2 次提交
  8. 02 12月, 2009 5 次提交
  9. 22 11月, 2009 5 次提交
  10. 21 11月, 2009 2 次提交
  11. 30 10月, 2009 1 次提交
  12. 27 10月, 2009 1 次提交
    • B
      e1000e: allow for swflag to be held over consecutive PHY accesses · 5ccdcecb
      Bruce Allan 提交于
      PCH-based parts (82577/82578) and some ICH8-based parts (82566) need to
      hold the swflag (sw/fw/hw hardware semaphore) over consecutive PHY accesses
      in order to perform sw-driven PHY configuration during initialization to
      workaround known hardware issues (see follow-on patch).  This patch
      provides new PHY read/write functions (and function pointers) that will
      allow accessing the PHY registers assuming the swflag has already been
      acquired.  The actual PHY register access code has moved into helper
      functions that are called with a flag indicating whether or not the swflag
      has already been acquired and acquires/releases it if not.
      
      The functions called from within the updated PHY access functions had to be
      updated to assume the swflag was already acquired, and other functions that
      called those functions were also updated to acquire/release the swflag.
      Signed-off-by: NBruce Allan <bruce.w.allan@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5ccdcecb
  13. 04 7月, 2009 2 次提交
  14. 03 6月, 2009 1 次提交
  15. 22 11月, 2008 2 次提交
  16. 03 9月, 2008 2 次提交
  17. 07 5月, 2008 1 次提交
    • B
      e1000e: Add support for BM PHYs on ICH9 · 97ac8cae
      Bruce Allan 提交于
      This patch adds support for the BM PHY, a new PHY model being used
      on ICH9-based implementations.
      
      This new PHY exposes issues in the ICH9 silicon when receiving
      jumbo frames large enough to use more than a certain part of the
      Rx FIFO, and this unfortunately breaks packet split jumbo receives.
      For this reason we re-introduce (for affected adapters only) the
      jumbo single-skb receive routine back so that people who do
      wish to use jumbo frames on these ich9 platforms can do so.
      Part of this problem has to do with CPU sleep states and to make
      sure that all the wake up timings are correctly we force them
      with the recently merged pm_qos infrastructure written by Mark
      Gross. (See http://lkml.org/lkml/2007/10/4/400).
      
      To make code read a bit easier we introduce a _IS_ICH flag so
      that we don't need to do mac type checks over the code.
      Signed-off-by: NBruce Allan <bruce.w.allan@intel.com>
      Signed-off-by: NAuke Kok <auke-jan.h.kok@intel.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      97ac8cae
  18. 25 4月, 2008 1 次提交
  19. 29 3月, 2008 2 次提交
  20. 24 2月, 2008 1 次提交
  21. 29 1月, 2008 1 次提交
  22. 11 10月, 2007 1 次提交
    • A
      [E1000E]: New pci-express e1000 driver (currently for ICH9 devices only) · bc7f75fa
      Auke Kok 提交于
      This driver implements support for the ICH9 on-board LAN ethernet
      device. The device is similar to ICH8.
      
      The driver encompasses code to support 82571/2/3, es2lan and ICH8
      devices as well, but those device IDs are disabled and will be
      "lifted" from the e1000 driver over one at a time once this driver
      receives some more live time.
      
      Changes to the last snapshot posted are exclusively in the internal
      hardware API organization. Many thanks to Jeff Garzik for jumping in
      and getting this organized with a keen eye on the future layout.
      
      [ Integrated napi_struct patch from Auke as well... -DaveM ]
      Signed-off-by: NAuke Kok <auke-jan.h.kok@intel.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      bc7f75fa