Add core definitions and memory map, gpio, irq, iomux, uart device
support.
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

mx5 SoCs have different GPIO port count.
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This iomux file has been constructed from the Freescale pinmux tool.
It contains all pins from the tool, but the datasheet lists some
configurations not present in the tool, these are not yet added.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch actually replaces the 'struct pad_desc' with a u64 cookie
to facilitate adding platform specific pad_ctrl settings to an
existing pad definition.

So, instead of:
	iomux_v3_cfg_t power_key = MX51_PAD_EIM_A27__GPIO_2_21;
	power_key.pad_ctrl = MX51_GPIO_PAD_CTRL_2;
	mxc_iomux_v3_setup_pad(&power_key);
one can write:
	mxc_iomux_v3_setup_pad((MX51_PAD_EIM_A27__GPIO_2_21 & ~MUX_PAD_CTRL_MASK) | MX51_GPIO_PAD_CTRL_2);

Patch applies to branch 'imx-for-2.6.38' of git://git.pengutronix.de/git/imx/linux-2.6Signed-Off-By: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

When building as module:
ERROR: "cpufreq_gov_performance" [arch/arm/plat-mxc/cpufreq.ko] undefined!
WARNING: modpost: Found 1 section mismatch(es).
To see full details build your kernel with:
'make CONFIG_DEBUG_SECTION_MISMATCH=y'
make[1]: *** [__modpost] Error 1
make: *** [modules] Error 2

It's due to the driver using CPUFREQ_DEFAULT_GOVERNOR, even it should not
(see commit 8122c6ce in Linus tree), so
remove it.
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add support for FIQ on mx51 TZIC

TZIC changes tested with FIQ audio on an mx51 board

AVIC changes build with mx3_defconfig, not tested
Signed-off-by: NPeter Horton <phorton@bitbox.co.uk>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add SSI3 to MX51
Signed-off-by: NPeter Horton <phorton@bitbox.co.uk>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Use clk_get to acquire the watchdog clock and also avoid hardcoding the clock name.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

MX51 has two watchdog modules.

Add support for both of them.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Currently, to define a GPIO number, we're using something like :

#define EFIKAMX_PCBID0         (2*32 + 16)

to define GPIO 3 16.

This is not really readable and it's error prone imho (note the 3 vs 2).
So, I'm introducing a new macro to define this in a better way. Now, the
code sample become :

#define EFIKAMX_PCBID0         IMX_GPIO_NR(3, 16)

v2:
- move to gpio.h
- add parens & spaces
- switch to IMX_GPIO_NR instead of MX51_GPIO_NR
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Eric Bénard <eric@eukrea.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Introduce SOC_IMX51 to keep consistency with the other i.MX devices
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

In commit 2c20b9f1 (ARM: mx25: dynamically allocate mxc-ehci devices) I
changed the offset to the value specified in the reference manual
intending to test this change on hardware.  This slipped through and now
prooved to be wrong.  So fix it and add a comment about the
documentation being wrong.
Reported-by: NJaume Ribot <jaume@fqingenieria.es>
Cc: Michael Trimarchi <trimarchi@gandalf.sssup.it>
Cc: Shawn Guo <shawn.gsc@gmail.com>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

commits 2eb42d5c and
9e1dde33 renamed some defines
but didn't fix all the places where these defines are used
leading to a compile failure for USB on i.MX31, 35 and 27.
Signed-off-by: NEric Bénard <eric@eukrea.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The SDMA firmware consists of a ROM part and a RAM part.
The ROM part is always present in the SDMA engine and
is sufficient for many cases.
This patch allows to pass in platform data containing
the script addresses in ROM, so loading a firmware is
optional now.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Acked-by: NDan Williams <dan.j.williams@intel.com>

Instead of reading the silicon version from ROM, we should
read the SREV register from the IIM.

Freescale has dropped all support for MX51 REV1.0, only MX51
REV 2.0 and 3.0 are valid.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add iomux, clocks,  and memory map for Freescale's MX53 SoC.
Add cpu_is_mx53 function to common.h.
Add 3 more banks of gpio's to mxc_gpio_ports.
Add MX53 phys offset address.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

There's no point showing this option to the user. The correct
value will be selected anyway.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch adds a Kconfig option for the avic irq controller
and lets the SoCs that need it select this option.
Also, as we have two irq controllers for i.MX, irq.c is not
appropriate anymore, so rename it to avic.c
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Commit "ARM: i.MX IOMUX-V3 replace struct pad_desc with bitmapped cookie"
(b705cb4d42e95a4a43a8945571c8613e71526c3d) introduced a typo which was
preventing my efikamx to boot. This patch is fixing that.
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The efikamx board is using a gpio to reset the board so add support
for it
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

s/NO_PAD_CTRL/MX51_GPIO_PAD_CTRL/
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add definitions for configuring CSI1_{H,V}SYNC as GPIO
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

- add definition to configure pads as ESDHC{1,2} WP and CD
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

- ALT0 is used to set GPIO mode of GPIO_1_{2,3,4,5,6,7,8,9} but it's ALT1
for GPIO_1_{0,1}.
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The following patch is a first step to convert the 'struct pad_desc'
to a bitmapped cookie to facilitate adding platform specific pullup or
drive strength definitions to existing pad definitions without need to
rewrite the complete pad def.

The patch wraps 'struct pad_desc' in an opaque data type and
introduces macros to access the individual members.
This patch does not constitute any functional change!
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

and restore alphabetic ordering.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

While adapting the #defines for this I noticed that the offset
used for USB HS on i.MX35 differs from the documented offset.
I kept the working offset and commented that the documentation
differs.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Compared to the static devices the dynamic have a DMA resource.
This should be save as it seems unused in the driver.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Additionally convert some known to be good usages to the new
names.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Some usages of ARCH_MX25 are assuming that if it is
defined the other SoCs are undefined.  Use SOC_IMX25 for the save
places.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>