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  1. 12 6月, 2015 1 次提交
  3. 11 6月, 2015 1 次提交
  5. 10 6月, 2015 1 次提交
  7. 09 6月, 2015 2 次提交
  9. 04 6月, 2015 1 次提交
  11. 31 5月, 2015 1 次提交
  13. 23 5月, 2015 1 次提交
  15. 16 5月, 2015 3 次提交
  17. 15 5月, 2015 1 次提交
    • F
      of: mdio: Add a "broken-turn-around" property · ab6016e0
      由 Florian Fainelli 提交于 
      Some Ethernet PHY devices/switches may not properly release the MDIO bus
during turn-around time, and fail to drive it low, which can be seen by
some controllers as a read failure, while the data clocked in is still
correct.

Add a boolean property "broken-turn-around" which is parsed by the
generic MDIO bus probing code and will set the corresponding bit in the
MDIO bus phy_ignore_ta_mask bitmask for MDIO bus drivers to utilize that
information.
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ab6016e0
  19. 10 5月, 2015 1 次提交
  21. 17 4月, 2015 1 次提交
  23. 09 4月, 2015 1 次提交
  25. 07 4月, 2015 1 次提交
    • P
      net: dsa: fix filling routing table from OF description · 30303813
      由 Pavel Nakonechny 提交于 
      According to description in 'include/net/dsa.h', in cascade switches
configurations where there are more than one interconnected devices,
'rtable' array in 'dsa_chip_data' structure is used to indicate which
port on this switch should be used to send packets to that are destined
for corresponding switch.

However, dsa_of_setup_routing_table() fills 'rtable' with port numbers
of the _target_ switch, but not current one.

This commit removes redundant devicetree parsing and adds needed port
number as a function argument. So dsa_of_setup_routing_table() now just
looks for target switch number by parsing parent of 'link' device node.

To remove possible misunderstandings with the way of determining target
switch number, a corresponding comment was added to the source code and
to the DSA device tree bindings documentation file.

This was tested on a custom board with two Marvell 88E6095 switches with
following corresponding routing tables: { -1, 10 } and { 8, -1 }.
Signed-off-by: NPavel Nakonechny <pavel.nakonechny@skitlab.ru>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      30303813
  27. 28 3月, 2015 1 次提交
  29. 27 3月, 2015 1 次提交
  31. 26 3月, 2015 1 次提交
  33. 25 3月, 2015 1 次提交
  35. 21 3月, 2015 2 次提交
    • W
      net: netcp: ethss: enhancement to support NetCP 1.5 ethss · 9a391c7b
      由 WingMan Kwok 提交于 
      NetCP 1.5 available on newer K2 SoCs such as K2E and K2L introduced 3
variants of the ethss subsystem, 9 port, 5 port and 2 port. These have
one host port towards the CPU and N external slave ports.

To customize the driver for these new ethss sub systems, multiple
compatibility strings are introduced. Currently some of parameters that
are different on different variants such as number of ALE ports, stats
modules and number of ports are defined through constants. These are now
changed to variables in gbe_priv data that get set based on the
compatibility string. This is required as there are no hardware
identification registers available to distinguish among the variants
of NetCP 1.5 ethss. However there is identification register available
to differentiate between NetCP 1.4 vs NetCP 1.5 and the same is made use
of in the code to differentiate them.

For more reading on the details of this peripheral, please refer to the
User Guide available at http://www.ti.com/lit/pdf/spruhz3Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: NWingMan Kwok <w-kwok2@ti.com>
CC: "David S. Miller" <davem@davemloft.net>
CC: Mugunthan V N <mugunthanvnm@ti.com>
CC: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
CC: Grygorii Strashko <grygorii.strashko@ti.com>
CC: Christoph Jaeger <cj@linux.com>
CC: Lokesh Vutla <lokeshvutla@ti.com>
CC: Markus Pargmann <mpa@pengutronix.de>
CC: Kumar Gala <galak@codeaurora.org>
CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Pawel Moll <pawel.moll@arm.com>
CC: Rob Herring <robh+dt@kernel.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      9a391c7b
    • K
      net: netcp: use separate reg region for individual ethss modules · 21e0e0dd
      由 Karicheri, Muralidharan 提交于 
      Ethss has multiple modules within the sub system
 - switch sub system
 - sgmii
 - mdio
 - switch module

NetCP driver re-uses existing davinci mdio driver. It requires to
have its own register region to map the reg space. So restructure
the code to use separate reg region for the individual modules it
manages. Use range property to define register space of NetCP and
use reg property to define individual reg spaces. So MDIO will have
its own reg space to map. This is a pre-requisite to enable MDIO
driver for NetCP.
Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: NWingMan Kwok <w-kwok2@ti.com>
CC: "David S. Miller" <davem@davemloft.net>
CC: Mugunthan V N <mugunthanvnm@ti.com>
CC: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
CC: Grygorii Strashko <grygorii.strashko@ti.com>
CC: Christoph Jaeger <cj@linux.com>
CC: Lokesh Vutla <lokeshvutla@ti.com>
CC: Markus Pargmann <mpa@pengutronix.de>
CC: Kumar Gala <galak@codeaurora.org>
CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Pawel Moll <pawel.moll@arm.com>
CC: Rob Herring <robh+dt@kernel.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      21e0e0dd
  37. 19 3月, 2015 2 次提交
  39. 09 3月, 2015 1 次提交
  41. 05 3月, 2015 1 次提交
  43. 28 2月, 2015 2 次提交
  45. 26 2月, 2015 1 次提交
  47. 04 2月, 2015 1 次提交
  49. 29 1月, 2015 1 次提交
  51. 28 1月, 2015 1 次提交
  53. 27 1月, 2015 1 次提交
  55. 26 1月, 2015 2 次提交
  57. 25 1月, 2015 1 次提交
  59. 20 1月, 2015 1 次提交
    • K
      Documentation: dt: net: Add binding doc for Keystone NetCP ethernet driver · 44eefcdf
      由 Karicheri, Muralidharan 提交于 
      The network coprocessor (NetCP) is a hardware accelerator that processes
Ethernet packets. NetCP has a gigabit Ethernet (GbE) subsystem with a ethernet
switch sub-module to send and receive packets. NetCP also includes a packet
accelerator (PA) module to perform packet classification operations such as
header matching, and packet modification operations such as checksum
generation. NetCP can also optionally include a Security Accelerator(SA)
capable of performing IPSec operations on ingress/egress packets.

Keystone SoC's also have a 10 Gigabit Ethernet Subsystem (XGbE) which
includes a 3-port Ethernet switch sub-module capable of 10Gb/s and
1Gb/s rates per Ethernet port.

NetCP Subsystem device tree layout looks something like below:

-----------------------------
  NetCP subsystem(10G or 1G)
-----------------------------
	|
	|-> NetCP Devices ->	|
	|			|-> GBE/XGBE Switch
	|			|
	|			|-> Packet Accelerator
	|			|
	|			|-> Security Accelerator
	|
	|
	|
	|-> NetCP Interfaces ->	|
				|-> Ethernet Port 0
				|
				|-> Ethernet Port 1
				|
				|-> Ethernet Port 2
				|
				|-> Ethernet Port 3

Common driver supports GBE as well XGBE network processors.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: David Miller <davem@davemloft.net>
Cc: Santosh Shilimkar <santosh.shilimkar@kernel.org>
Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      44eefcdf
  61. 17 1月, 2015 2 次提交
  63. 16 1月, 2015 1 次提交