This adds basic spi nodes and pinctrl settings to the rk3066 and rk3188
devicetree files.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

Add the two dwc2 controllers providing an otg and a designated host port.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

This is a remnant from the first i2c driver iteration that seems to have
been forgotten and thus made its way into the dtsi. Remove it.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

Add the core device nodes for the SARADC found on both the Cortex-A9 series
(rk3066 and rk3188) as well as the newer rk3288.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

This adds the Designware compatible watchdog found on RK3xxx Cortex-A9 SoCs.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

This adds the necessary nodex and pinctrl settings for the Rockchip PWM-driver.
Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com>

Modified to use the new clock defines and added rk3066 pins.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

Use the newly ammended dw_8250 clock binding to define both the baudclk as
well as the pclk supplying the ip.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

The core controller settings themself are identical, only the compatible and
pinctrl settings differ.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

To create some sort of ordering of nodes, they are suggested to be ordered by
their register address.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

Some nodes that are changed in the dtsi hierarchy do not have handles yet.
As it was suggested in the rk3288 submission to do subsequent nodes changes
through such handle-references, add the missing ones.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

Comments received from the rk3288 submission indicated that a generic subnode
to group soc components should not be used.

So to keep all rockchip devicetree files similar, remove it from rk3066 and rk3188.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

The clock definitions get a lot shorter due to the soc clocks being handled by
rk3188-cru and only the input clock remains. These can now simply live
in the main rk3xxx.dtsi without affecting readability.

At the same time, rename the node to oscillator, adding a clock-output-names
property to match how the rk3288 handles this.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Acked-By: NMax Schwarz <max.schwarz@online.de>
Tested-By: NMax Schwarz <max.schwarz@online.de>

This adds a node for the clock and reset unit on rk3188 and rk3066 SoCs and
also updates the device nodes retrieve their clocks from there, instead of
the previous gate clock nodes.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Acked-By: NMax Schwarz <max.schwarz@online.de>
Tested-By: NMax Schwarz <max.schwarz@online.de>

Introduce the grf syscon and convert the pinctrl drivers for rk3066 and rk3188
to use it, instead of mapping the grf registers themselfs.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NMax Schwarz <max.schwarz@online.de>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

The pmu is needed to bring up the cores during smp operations and later
also other system parts. Therefore add a node and documentation for it.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NUlrich Prinz <ulrich.prinz@googlemail.com>

This adds the device-node and config select to enable the
scu in all Rockchip Cortex-A9 SoCs.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NUlrich Prinz <ulrich.prinz@googlemail.com>

RK2928 and RK3066 contain a dw_apb timer component, while the rk3188 uses
a slightly similar but still different timer component. But all of them
support the ARM-global-timer that got added as clocksource driver recently.

So enable support for it to get a working clocksource for rk3188.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

The rk3188 SoC shares a lot of peripherals with the rk3066 SoC,
but not all. Therefore move the common parts to a shared dtsi.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>