1. 17 6月, 2013 2 次提交
  2. 31 5月, 2013 3 次提交
  3. 13 1月, 2013 2 次提交
  4. 08 1月, 2013 3 次提交
  5. 25 12月, 2012 1 次提交
  6. 18 12月, 2012 1 次提交
  7. 21 11月, 2012 1 次提交
  8. 15 11月, 2012 1 次提交
  9. 13 11月, 2012 1 次提交
  10. 12 11月, 2012 2 次提交
    • L
      pinctrl/coh901: use irqdomain, allocate irqdescs · a6c45b99
      Linus Walleij 提交于
      This switches the COH 901 pinctrl driver to allocate its GPIO
      IRQs dynamically, and start to use a linear irqdomain to map
      from the hardware IRQs.
      
      This way we can cut away the complex allocation of IRQ numbers
      from the <mach/irqs.h> file.
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      a6c45b99
    • L
      ARM: U300: bump IRQs to offset 32 · d4a31ee8
      Linus Walleij 提交于
      The U300 IRQs were bumped once to offset to 1 (in order to avoid
      using IRQ 0 which is now NO_IRQ). This was OK as we were still
      passing the number of irqs in the .nr_irqs field of the machine,
      with descriptors allocated at boot time.
      
      However .nr_irqs should be 0, leading the system to reserve the
      first 16 IRQs. Then the VIC driver will complain that IRQs 1
      thru 15 are pre-allocated, so to avoid this and use free
      descriptors, move all IRQs up to offset 32.
      
      This will all be done away with as we migrate to device tree,
      so it is an interim solution.
      Acked-by: NOlof Johansson <olof@lixom.net>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      d4a31ee8
  11. 20 9月, 2012 1 次提交
    • P
      spi/pl022: adopt pinctrl support · 4f5e1b37
      Patrice Chotard 提交于
      Amend the PL022 pin controller to optionally take a pin control
      handle and set the state of the pins to "default" on boot and
      runtime resume, and to "sleep" at runtime suspend. This way we
      will dynamically save power on the SPI busses, for example some
      electronic designs may be able to ground the pins when unused
      instead of pull-up. Some pin controllers may want to set the
      pins as wake-up sources when sleeping.
      
      Effect on platforms using the PL022 driver:
      
      - If the platform does not use pin control - no semantic effect,
        the pinctrl stubs will kick in and resolve the situation.
      
      - Platforms using this driver and have pin control but no
        function defined for the PL022 need to either supply a
        "default" function in their map or enable pinctrl dummies
        so the driver is satisfied.
      
      - Platforms using this driver with hogs for setting up the PL022
        pin control - stop using hogs to take the pl022 pin control
        handle, let the driver handle this.
      
      I'be looked at some platforms that may be affected:
      
      - SPEAr: appears to define the proper functions in their device
        trees and not hogging them, so things should be smooth, the
        driver will simply start to take its pins.
      
      - Ux500: the proper function is defined and will be taken properly
        by the driver. New sleep states introduced by a separate patch to
        ux500 but no regression, since the default state is sufficient.
      
      - U300: old hog deleted as part of this patch.
      
      - LPC32xx: does not appear to be using pinctrl.
      
      - ARM Integrator IMPD1, RealView & Versatile: does not use pinctrl.
      Tested-by: NRoland Stigge <stigge@antcom.de>
      Signed-off-by: NPatrice Chotard <patrice.chotard@stericsson.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      4f5e1b37
  12. 13 8月, 2012 6 次提交
  13. 12 7月, 2012 1 次提交
  14. 20 4月, 2012 1 次提交
    • L
      ARM: u300: bump all IRQ numbers by one · 1344500e
      Linus Walleij 提交于
      Since the VIC was converted to use generic IRQ domains IRQ 0
      is silently ignored. This IRQ is used on the U300 so we're
      missing it now. Bump all IRQ numbers by one since they are
      now decoupled from the hardware IRQ numbers.
      
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      1344500e
  15. 27 3月, 2012 1 次提交
  16. 13 3月, 2012 1 次提交
  17. 05 3月, 2012 2 次提交
    • S
      pinctrl: enhance mapping table to support pin config operations · 1e2082b5
      Stephen Warren 提交于
      The pinctrl mapping table can now contain entries to:
      * Set the mux function of a pin group
      * Apply a set of pin config options to a pin or a group
      
      This allows pinctrl_select_state() to apply pin configs settings as well
      as mux settings.
      
      v3: Fix find_pinctrl() to iterate over the correct list.
         s/_MUX_CONFIGS_/_CONFIGS_/ in mapping table macros.
         Fix documentation to use correct mapping table macro.
      v2: Added numerous extra PIN_MAP_*() special-case macros.
         Fixed kerneldoc typo. Delete pinctrl_get_pin_id() and
         replace it with pin_get_from_name(). Various minor fixes.
         Updates due to rebase.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Acked-by: NDong Aisheng <dong.aisheng@linaro.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      1e2082b5
    • S
      pinctrl: API changes to support multiple states per device · 6e5e959d
      Stephen Warren 提交于
      The API model is changed from:
      
      p = pinctrl_get(dev, "state1");
      pinctrl_enable(p);
      ...
      pinctrl_disable(p);
      pinctrl_put(p);
      p = pinctrl_get(dev, "state2");
      pinctrl_enable(p);
      ...
      pinctrl_disable(p);
      pinctrl_put(p);
      
      to this:
      
      p = pinctrl_get(dev);
      s1 = pinctrl_lookup_state(p, "state1");
      s2 = pinctrl_lookup_state(p, "state2");
      pinctrl_select_state(p, s1);
      ...
      pinctrl_select_state(p, s2);
      ...
      pinctrl_put(p);
      
      This allows devices to directly transition between states without
      disabling the pin controller programming and put()/get()ing the
      configuration data each time. This model will also better suit pinconf
      programming, which doesn't have a concept of "disable".
      
      The special-case hogging feature of pin controllers is re-written to use
      the regular APIs instead of special-case code. Hence, the pinmux-hogs
      debugfs file is removed; see the top-level pinctrl-handles files for
      equivalent data.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Acked-by: NDong Aisheng <dong.aisheng@linaro.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      6e5e959d
  18. 02 3月, 2012 2 次提交
  19. 24 2月, 2012 1 次提交
  20. 23 2月, 2012 1 次提交
    • L
      pinctrl: spawn U300 pinctrl from the COH901 GPIO · 128a06d4
      Linus Walleij 提交于
      This solves the riddle on how the U300 pin controller shall be
      able to reference the struct gpio_chip even though these are
      two separate drivers: spawn the pinctrl child from the GPIO
      driver and pass in the struct gpio_chip as platform data.
      In the process we rename the U300 "pinmux-u300" to
      "pinctrl-u300" so as not to confuse.
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      128a06d4
  21. 11 2月, 2012 2 次提交
  22. 27 1月, 2012 1 次提交
  23. 25 1月, 2012 1 次提交
  24. 05 1月, 2012 2 次提交